LPC-H3131 Olimex Ltd., LPC-H3131 Datasheet - Page 16
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LPC-H3131
Manufacturer Part Number
LPC-H3131
Description
Microcontroller & Microprocessor Development Tools HDR BRD FOR LPC3131
Manufacturer
Olimex Ltd.
Datasheet
1.LPC-H3131.pdf
(20 pages)
Specifications of LPC-H3131
Processor To Be Evaluated
LPC3131
Data Bus Width
32 bit
Interface Type
USB, I2S, SPI, I2C, UART
Operating Supply Voltage
1.2 V
Core Architecture
ARM
Cpu Core
ARM926EJ-S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SPI
I
2
C-bus master/slave interface
other devices which support the SPI/SSI protocol. Examples are memories,
cameras, or WiFi-g. The SPI/SSI-bus is a 5-wire interface, and it is suitable for low,
medium, and high data rate transfers.
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The LPC3131 contains two I
This module has the following features:
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Supports Motorola SPI frame format with a word size of 8/16 bits.
Texas Instruments SSI (Synchronous Serial Interface) frame format with a word
size of 4 bit to 16 bit.
Receive FIFO and transmit FIFO of 64 half-words each.
Serial clock rate master mode maximum 45 MHz.
Serial clock rate slave mode maximum 25 MHz.
Support for single data access DMA.
Full-duplex operation.
Supports up to three slaves.
Supports maskable interrupts.
Supports DMA transfers.
I
open-drain pins. This interface supports functions described in the I
specification for speeds up to 400 kHz. This includes multi-master operation
and allows powering off this device in a working system while leaving the I
bus functional.
I
with a single-master I
Standard I/Os also do not support multi-master I
Supports normal mode (100 kHz SCL).
Fast mode (400 kHz SCL with 24 MHz APB clock; 325 kHz with12 MHz APB
clock; 175 kHz with 6 MHz APB clock).
Interrupt support.
Supports DMA transfers (single).
Supports DMA transfers (single).
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2
2
C-bus interface 0 ( I
C-bus interface 1 (I
The SPI module is used for synchronous serial data communication with
This module has the following features:
Master transmitter
Master receiver
Slave transmitter
Slave receiver
2
2
C1): I
C0): I
2
C-bus and does not support powering off of this device.
2
C master/slave interfaces.
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2
2
C1 uses standard I/O pins and is intended for use
C0 is a standard I
2
C-compliant bus interface with
2
C implementations.
2
C-bus
2
C-