IRFPG50 Vishay, IRFPG50 Datasheet - Page 7

MOSFET N-CH 1000V 6.1A TO-247AC

IRFPG50

Manufacturer Part Number
IRFPG50
Description
MOSFET N-CH 1000V 6.1A TO-247AC
Manufacturer
Vishay
Datasheet

Specifications of IRFPG50

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
2 Ohm @ 3.6A, 10V
Drain To Source Voltage (vdss)
1000V (1kV)
Current - Continuous Drain (id) @ 25° C
6.1A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
190nC @ 10V
Input Capacitance (ciss) @ Vds
2800pF @ 25V
Power - Max
190W
Mounting Type
Through Hole
Package / Case
TO-247-3 (Straight Leads), TO-247AC
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
2 Ohms
Drain-source Breakdown Voltage
1000 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
6.1 A
Power Dissipation
190 W
Maximum Operating Temperature
+ 150 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*IRFPG50

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Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91254.
Document Number: 91254
S11-0441-Rev. B, 14-Mar-11
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
Re-applied
voltage
Reverse
recovery
current
+
R
-
g
D.U.T.
Note
a. V
Driver gate drive
D.U.T. l
D.U.T. V
Inductor current
GS
= 5 V for logic level devices
P.W.
SD
DS
waveform
This datasheet is subject to change without notice.
waveform
Peak Diode Recovery dV/dt Test Circuit
Ripple ≤ 5 %
Body diode forward drop
Period
Body diode forward
+
-
Fig. 14 - For N-Channel
• dV/dt controlled by R
• Driver same type as D.U.T.
• I
• D.U.T. - device under test
Diode recovery
SD
current
controlled by duty factor “D”
Circuit layout considerations
dV/dt
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
dI/dt
D =
-
g
Period
P.W.
+
V
I
V
SD
GS
DD
= 10 V
IRFPG50, SiHFPG50
+
-
V
DD
a
www.vishay.com/doc?91000
Vishay Siliconix
www.vishay.com
7

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