ADG409BR Analog Devices Inc, ADG409BR Datasheet - Page 13

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ADG409BR

Manufacturer Part Number
ADG409BR
Description
Analog Multiplexer Dual 4:1 16-Pin SOIC N
Manufacturer
Analog Devices Inc
Type
Analog Multiplexerr
Series
LC²MOSr
Datasheet

Specifications of ADG409BR

Package
16SOIC N
Maximum On Resistance
100@±15V Ohm
Maximum Propagation Delay Bus To Bus
130(Typ)@12V@-40C to 85C|250@±15V@-40C to 85C ns
Maximum High Level Output Current
20 mA
Multiplexer Architecture
4:1
Maximum Turn-off Time
60(Typ)@12V ns
Maximum Turn-on Time
150@±15V ns
Power Supply Type
Single|Dual
Rohs Status
RoHS non-compliant
Function
Multiplexer
Circuit
2 x 4:1
On-state Resistance
100 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
5V, 12V
Current - Supply
100µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.154", 3.90mm Width)
Multiplexer Configuration
Dual 4:1
Number Of Inputs
8
Number Of Outputs
2
Number Of Channels
2
Analog Switch On Resistance
100@±15VOhm
Analog Switch Turn On Time
150ns
Analog Switch Turn Off Time
60ns
Package Type
SOIC N
Power Supply Requirement
Single/Dual
Single Supply Voltage (min)
5V
Single Supply Voltage (typ)
12V
Single Supply Voltage (max)
12V
Dual Supply Voltage (typ)
±15V
Dual Supply Voltage (max)
±22V
Power Dissipation
600mW
Supply Current
2@±15VmA
Mounting
Surface Mount
Pin Count
16
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant

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TERMINOLOGY
R
Ohmic resistance between D and S.
ΔR
Difference between the R
I
Source leakage current when the switch is off.
I
Drain leakage current when the switch is off.
I
Channel leakage current when the switch is on.
V
Analog voltage on Terminal D and Terminal S.
C
Channel input capacitance for off condition.
C
Channel output capacitance for off condition.
C
On switch capacitance.
C
Digital input capacitance.
t
Delay time between the 50% and 90% points of the digital input
and switch on condition.
t
Delay time between the 50% and 90% points of the digital input
and switch off condition.
ON
OFF
S
D
D
ON
S
D
D
IN
D
, I
(OFF)
(OFF)
, C
(OFF)
ON
(V
(OFF)
(EN)
S
(EN)
(ON)
S
S
)
(ON)
ON
of any two channels.
Rev. C | Page 13 of 16
t
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
t
Off time measured between the 80% point of both switches
when switching from one address state to another.
V
Maximum input voltage for Logic 0.
V
Minimum input voltage for Logic 1.
I
Input current of the digital input.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off channel.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
I
Positive supply current.
I
Negative supply current.
TRANSITION
OPEN
INL
DD
SS
INL
INH
(I
INH
)
ADG408/ADG409

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