MT88E45BS1 Zarlink, MT88E45BS1 Datasheet - Page 26

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MT88E45BS1

Manufacturer Part Number
MT88E45BS1
Description
Caller ID CMOS 3.58MHz 3.3V 20-Pin SOIC Tube
Manufacturer
Zarlink
Datasheet

Specifications of MT88E45BS1

Package
20SOIC
Telecommunication Standards Supported
ANSI/TIA/EIA-716|ETSI/ETS 300 778-1|GR-30|SIN227|SIN242|SR-TSV-002476|TIA/EIA-777
Fabrication Technology
CMOS
Maximum Data Rate
1212 Bd
Typical Operating Supply Voltage
3.3 V
Typical Supply Current
2.8 mA
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
85 °C
Operating Frequency
3.58 MHz
Advance Information
Notes:
1) From TW/P&E/312. Start time: The CPE should enter the signalling state by applying the DC and AC terminations within this time
2) End time: The CPE should leave the signalling state by removing the DC and AC terminations within this time after the end of Data,
3) PWDN and FSKen are internal signals decoded from CB0/1/2.
4) This signal represents the mode of the DR/STD pin.
A/B Wires
TE DC load
TE AC load
after the end of the ring burst.
indicated by CD returning to high. The MT88E45 should also be taken out of FSK mode at this time to prevent the FSK
demodulator from reacting to other in-band signals such as speech, and DTMF tones.
FSKen
Note 3
PWDN
DCLK
DATA
OSC2
Note 3
Note 4
CD
DR
Figure 18 - Application Timing for UK’s CCA Caller Display Service (CDS), e.g., CLIP
Line Reversal (Optionally sent)
Ring Burst
Note 1
250-400ms
A
t
PU
B
Ch. seizure
..101010..
t
CP
C
Mark
D
Note 2
50-150ms
Data
Data
E
t
CA
t
PD
F
A = 200-450ms
B
C = 80-262ms
D = 45-262ms
E
F >200ms
Note:
from "CCA Exceptions
Document Issue 3"
First Complete
Ring Cycle
500ms
2.5s (typ. 500ms)
MT88E45
Parameter
F
25

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