LE75282BBVC Zarlink, LE75282BBVC Datasheet
LE75282BBVC
Specifications of LE75282BBVC
Available stocks
Related parts for LE75282BBVC
LE75282BBVC Summary of contents
Page 1
The Le7920 Subscriber Line Interface Circuit implements the basic telephone line interface functions, and enables the DISTINCTIVE CHARACTERISTICS Control states: Active, Ringing, Standby, and Disconnect Low standby power (35 mW) – –58 V battery operation On-hook transmission Two-wire ...
Page 2
... Test Circuits .14 Test Circuits (continued .15 Test Circuits (continued .16 Physical Dimensions .17 32-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Revision C to Revision .18 Revision D to Revision .18 Revision E to Revision .18 Revision F to Revision .18 Revision G to Revision .18 Revision H to Revision .18 Revision I1 to Revision .18 Revision J1 to Revision J2 .18 2 Zarlink Semiconductor Inc. ...
Page 3
... It should be noted that parts marked with either the "Am" or the "Le" part number prefix are equivalent devices in terms of form, fit, and function ...
Page 4
... CONNECTION DIAGRAM Top View RYOUT2 RYOUT3 TMG VBAT DET Notes: 1. Pin 1 is marked for orientation Connect 32-Pin 7 PLCC Zarlink Semiconductor Inc HPB 27 HPA VTX 24 VBREF 23 RSN 22 AGND 21 ...
Page 5
... Thermal Management. External resistor connects between this pin and VBAT to offload power from SLIC. Battery supply and connection to substrate. This is an Zarlink reserved pin and must always be connected to the VBAT pin power supply. Transmit Audio. This output is a 0.50 gain version of the A(TIP) and B(RING) metallic voltage ...
Page 6
... Stresses above those listed under "Absolute Maximum Ratings" can cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability BAT BAT + 0 Zarlink Semiconductor Inc. ...
Page 7
... AGND/DGND ....................... –100 mV to +100 mV Load resistance on VTX to ground .............. 20 kΩ min * Zarlink guarantees the performance of this device over commercial (0 to 70º C) and industrial (-40 to 85ºC) temperature ranges by conducting electrical characterization over each range and by conducting a production test with single insertion coupled to periodic sampling ...
Page 8
... L 0 dBm, 1 kHz 0 dBm, 1 kHz On hook 300 to 3.4 kHz relative to 1 kHz +3 dBm to –55 dBm relative to 0 dBm 0 dBm to –37 dBm +3 dBm to 0 dBm 0 dBm, 1 kHz 8 Zarlink Semiconductor Inc. Min Typ Max Unit 26 dB Ω –50 +50 mV 2.5 Vpk 0 ...
Page 9
... Active state, BAT = –48 V Disconnect state Standby state Active state, BAT = –48 V 100 kHz to 30 MHz, (See Figure RSN 200 Hz to 3.4 kHz I = 0.3 mA, 15 kΩ OUT –0.1 mA, 15 kΩ OUT CC Source resistance = 2 MΩ 9 Zarlink Semiconductor Inc. Min Typ Max Unit 0. 100 µ ...
Page 10
... T2 RSN R = 150 kΩ This specification assumes that the two-wire, AC-load impedance matches TX RX network such as that shown in Note 1. The network reduces the group delay to less than T 10 Zarlink Semiconductor Inc. Min Typ Max Unit 11.5 17.3 9.4 14 4.4 +0.3 +0 ...
Page 11
... TMG Disconnect states. Power dissipated in the SLIC while in Active and Disconnect 0.12 L states. 11 Zarlink Semiconductor Inc. DET Output Ring trip Ring trip Loop detector Loop detector , and Z is the desired 2-wire AC input F 2WIN , the internal current amplifier T is defined above, and ...
Page 12
... DC FEED CHARACTERISTICS 60 VAB (volts DC1 BAT = –48 V Notes: 1250 ----------- - where ---------- - = 0.857 + 3.3 – AB BAT L 300 ---------- - = 0.857 + 1.2 – AB BAT L 300 3 I (mA 54.34 kΩ DC2 Load Line (Typical) 12 Zarlink Semiconductor Inc ...
Page 13
... SLIC Feed current programmed Feed Programming Figure 1. DC Feed Characteristics Zarlink Semiconductor Inc. RSN R DC1 R DC2 RDC and R DC1 DC2 ...
Page 14
... L-4 Long. Bal log (V A(TIP) VTX L SLIC AGND L RSN B(RING log ( L2 Two- to Four-Wire Insertion Loss A(TIP) VTX SLIC R AGND L RSN B(RING log ( L4 BRS = 20 log ( A(TIP) VTX R L SLIC AGND RSN B(RING) S2 Closed, S1 Open 4-L Long. Sig. Gen log ( Longitudinal Balance 14 Zarlink Semiconductor Inc ...
Page 15
... MHz Z D A(TIP B(RING Two-Wire Return Loss Test Circuit V CC 6.2 kΩ A(TIP) DET B(RING Loop-Detector Switching 200 Ω 200 Ω RFI Test Circuit 15 Zarlink Semiconductor Inc. VTX R T1 SLIC AGND Ω CAX Ω CBX VTX 33 nF SLIC under test C T1 ...
Page 16
... BAT D 1 VCC VTX A(TIP) HPA RSN HPB B(RING) RDC RINGOUT RYOUT1 AGND/ DGND RYOUT3 RYOUT3 D3 D2 BGND D1 C2 VBREF VBAT C1 DET TMG CAS R TMG G. Le7920 Test Circuit 16 Zarlink Semiconductor Inc DC2 DC1 C DC BATTERY GROUND ANALOG GROUND DIGITAL GROUND C CAS ...
Page 17
... Exact shape of this feature is optional. 0.550 0.553 5 Details of pin 1 identifier are optional but must be located -- 10 deg within the zone indicated. 6 Sum of DAM bar protrusions to be 0.007 max per lead. 7 Controlling dimension : Inch. 8 Reference document : JEDEC MS-016 32-Pin PLCC 17 Zarlink Semiconductor Inc. ...
Page 18
... REVISION SUMMARY Revision C to Revision D • Minor changes were made to the datasheet style and format to conform to Zarlink standards. Revision D to Revision E • Absolute Maximum Ratings: Added ESD immunity specification. Revision E to Revision F • Added the 28-pin SOIC connection diagram and the SC option to the ordering information. ...
Page 19
... Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned ...