MT8806AP1 Zarlink, MT8806AP1 Datasheet - Page 3

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MT8806AP1

Manufacturer Part Number
MT8806AP1
Description
Analog Audio/Video Crosspoint 45MHz 8 x 4 28-Pin PLCC Tube
Manufacturer
Zarlink
Datasheet

Specifications of MT8806AP1

Package
28PLCC
Number Of Arrays
1
Power Supply Type
Single
3db Bandwidth
45 MHz
Minimum Single Supply Voltage
4.5 V
Maximum Single Supply Voltage
13.2 V
Maximum On Resistance
185 Ohm

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT8806AP1
Manufacturer:
TI
Quantity:
95
Functional Description
The MT8806 is an analog switch matrix with an array size of 8 x 4. The switch array is arranged such that there are
8 columns by 4 rows. The columns are referred to as the Y inputs/outputs and the rows are the X inputs/outputs.
The crosspoint analog switch array will interconnect any X I/O with any Y I/O when turned on and provide a high
degree of isolation when turned off. The control memory consists of a 32 bit write only RAM in which the bits are
selected by the address inputs (AY0-AY2, AX0 & AX1). Data is presented to the memory on the DATA input. Data is
asynchronously written into memory whenever both the CS (Chip Select) and the STROBE inputs are high and is
latched on the falling edge of STROBE. A logical “1” written into a memory cell turns the corresponding crosspoint
switch on and a logical “0” turns the crosspoint off. Only the crosspoint switches corresponding to the addressed
memory location are altered when data is written into memory. The remaining switches retain their previous states.
Any combination of X and Y inputs/outputs can be interconnected by establishing appropriate patterns in the control
memory. A logical “1” on the RESET input will asynchronously return all memory locations to logical “0” turning off
all crosspoint switches regardless of whether CS is high or low. Two voltage reference pins (V
provided for the MT8806 to enable switching of negative analog signals. The range for digital signals is from V
V
reference is needed.
Address Decode
The five address inputs along with the STROBE and CS (Chip Select) inputs are logically ANDed to form an enable
signal for the resettable transparent latches. The DATA input is buffered and is used as the input to all latches. To
write to a location, RESET must be low and CS must go high while the address and data are set up. Then the
STROBE input is set high and then low causing the data to be latched. The data can be changed while STROBE is
high, however, the corresponding switch will turn on and off in accordance with the DATA input. DATA must be
stable on the falling edge of STROBE in order for correct data to be written to the latch.
Pin Description
19-23
SS
PDIP
24
while the range for analog signals is from V
Pin #
PLCC
18, 19
23-27
4, 5,
28
Y7-Y3
Name
VDD
NC
Y7-Y3 Analog (Inputs/Outputs): these are connected to the Y7-Y3 columns of
the switch array.
Positive Power Supply
No Connect
Zarlink Semiconductor Inc.
DD
to V
MT8806
EE
3
. V
SS
and V
Description
EE
pins can be tied together if a single voltage
SS
Data Sheet
and V
EE
DD
) are
to

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