AD9203ARU Analog Devices Inc, AD9203ARU Datasheet - Page 3

• Manufacturer Part Number: AD9203ARU
• Description: ADC Single Pipelined 40MSPS 10-Bit Parallel 28-Pin TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD9203ARU

• Package: 28TSSOP
• Resolution: 10 Bit
• Sampling Rate: 40 MSPS
• Architecture: Pipelined
• Number Of Analog Inputs: 1
• Digital Interface Type: Parallel
• Input Type: Voltage
• Signal To Noise Ratio: 60(Typ) dB
• Rohs Status: RoHS non-compliant
• Number Of Bits: 10
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Number Of Converters: 5
• Power Dissipation (max): 108mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP (0.173", 4.40mm Width)

SPECIFICATIONS
AVDD = 3 V, DRVDD = 3 V, F
cycle, T
Table 1.
Parameter
RESOLUTION
MAX CONVERSION RATE
PIPELINE DELAY
DC ACCURACY
ANALOG INPUT
INTERNAL REFERENCE
POWER SUPPLY
DYNAMIC PERFORMANCE (AIN = 0.5 dBFS)
Differential Nonlinearity
Integral Nonlinearity
Offset Error
Gain Error
Input Voltage Range
Input Capacitance
Aperture Delay
Aperture Uncertainty (Jitter)
Input Bandwidth (–3 dB)
Input Referred Noise
Output Voltage (0.5 V Mode)
Output Voltage (1 V Mode)
Output Voltage Tolerance (1 V Mode)
Load Regulation
Operating Voltage
Analog Supply Current
Digital Supply Current
Power Consumption
Power-Down
Power Supply Rejection Ratio
Signal-to-Noise and Distortion
Effective Bits
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range
f = 4.8 MHz
f = 20 MHz
f = 4.8 MHz
f = 20 MHz
f = 4.8 MHz
f = 20 MHz
f = 4.8MHz
f = 20 MHz
f = 4.8 MHz
f = 20 MHz
MIN
to T
MAX
1
1
1
unless otherwise noted.
S
= 40 MSPS, input span from 0.5 V to 2.5 V, internal 1 V reference, PWRCON = AVDD, 50% clock duty
1
Symbol
F
DNL
INL
E
E
AIN
C
T
T
BW
VREF
VREF
AVDD
DRVDD
IAVDD
IDRVDD
P
PSRR
SINAD
ENOB
SNR
THD
SFDR
S
ZS
FS
AP
AJ
D
IN
Min
40
1
2.7
2.7
57.2
9.2
57.5
67.8
Rev. B | Page 3 of 28
Typ
10
± 0.25 ± 0.7
± 0.65 ± 1.4
± 0.6 ± 2.8
± 0.7 ± 4.0
1.4
2.0
1.2
390
0.3
0.5
1
± 5
0.65
3.0
3.0
20.1
4.4
9.5
74
88.8
0.65
0.04
59.7
59.3
9.6
9.55
60.0
59.5
−76.0
−74.0
80
78
Max
5.5
LSB
LSB
% FSR
% FSR
2
± 30
1.2
3.6
3.6
22.0
6.0
14.0
84.0
108.0
1.2
± 0.25
−65.0
Unit
Bits
MSPS
Clock
Cycles
V p-p
pF
ns
ps rms
MHz
mV
V
V
mV
mV
V
V
mA
mA
mA
mW
mW
mW
% F
dB
dB
Bits
Bits
dB
dB
dB
dB
dB
dB
S
Conditions
Switched, Single-Ended
REFSENSE = VREF
REFSENSE = GND
1.0 mA Load
f
f
f
f
IN
IN
IN
IN
= 4.8 MHz, Output Bus Load = 10pF
= 20 MHz, Output Bus Load = 20 pF
= 4.8 MHz, Output Bus Load = 10pF
= 20 MHz, Output Bus Load = 20 pF
AD9203