HSMP-381C-BLKG Avago Technologies US Inc., HSMP-381C-BLKG Datasheet - Page 4
![DIODE PIN ATTENUATOR SER SOT-323](/photos/22/12/221248/4533164_sml.jpg)
HSMP-381C-BLKG
Manufacturer Part Number
HSMP-381C-BLKG
Description
DIODE PIN ATTENUATOR SER SOT-323
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HSMP-3812-BLKG.pdf
(9 pages)
Specifications of HSMP-381C-BLKG
Diode Type
PIN - 1 Pair Series Connection
Voltage - Peak Reverse (max)
100V
Current - Max
1A
Capacitance @ Vr, F
0.35pF @ 50V, 1MHz
Resistance @ If, F
3 Ohm @ 100mA, 100MHz
Package / Case
SC-70-3, SOT-323-3
Diode Case Style
SOT-323
Series Resistance @ If
3ohm
Peak Reflow Compatible (260 C)
Yes
Capacitance Ct
0.27pF
Leaded Process Compatible
Yes
Forward Current If
1A
Breakdown Voltage
100V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HSMP-381C-BLKG
Manufacturer:
AVAGO
Quantity:
40 000
Typical Applications for HSMP-481x Low Inductance Series
Microstrip Series Connection for HSMP-481x Series
In order to take full advantage of the low inductance of the
HSMP-481x series when using them in series applications,
both lead 1 and lead 2 should be connected together, as
shown in Figure 7.
Figure 6. Internal Connections.
Microstrip Shunt Connections for HSMP-481x Series
In Figure 8, the center conductor of the microstrip
line is interrupted and leads 1 and 2 of the HSMP-481x
series diode are placed across the resulting gap. This forces
the 1.5 nH lead inductance of leads 1 and 2 to appear as
part of a low pass filter, reducing the shunt
parasitic inductance and increasing the maximum available
attenuation. The 0.3 nHof shunt inductance external to the
diode is created by the via holes, and is a good estimate
for 0.032" thick material.
Figure 8. Circuit Layout.
4
50 OHM MICROSTRIP LINES
1
HSMP-481x
PAD CONNECTED TO
3
GROUND BY TWO
VIA HOLES
2
Figure 7. Circuit Layout.
Figure 9. Equivalent Circuit.
R
j
1.5 nH
0.08
I
b
0.9
R
+ 2.5
j
0.3 nH
0.3 nH
0.3 pF
1.5 nH