TS1220-600B-TR STMicroelectronics, TS1220-600B-TR Datasheet - Page 4

• Manufacturer Part Number: TS1220-600B-TR
• Description: SCR 12A 20MA 600V DPAK
• Manufacturer: STMicroelectronics

Specifications of TS1220-600B-TR

• Scr Type: Sensitive Gate
• Voltage - Off State: 600V
• Voltage - Gate Trigger (vgt) (max): 800mV
• Voltage - On State (vtm) (max): 1.6V
• Current - On State (it (av)) (max): 8A
• Current - On State (it (rms)) (max): 12A
• Current - Gate Trigger (igt) (max): 200µA
• Current - Hold (ih) (max): 5mA
• Current - Off State (max): 5µA
• Current - Non Rep. Surge 50, 60hz (itsm): 110A, 115A
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Current - On State (it (rms) (max): 12A
• Breakover Current Ibo Max: 115 A
• Rated Repetitive Off-state Voltage Vdrm: 600 V
• Off-state Leakage Current @ Vdrm Idrm: 5 uA
• Forward Voltage Drop: 1.6 V
• Gate Trigger Voltage (vgt): 0.8 V
• Gate Trigger Current (igt): 0.2 mA
• Holding Current (ih Max): 5 mA
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-6771-2; TS1220-600B-TR

Characteristics
4/12
Figure 3.
Figure 5.
Figure 7.
3.0
2.5
2.0
1.5
1.0
0.5
0.0
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.00
0.10
0.01
-40
1E-2
I
0
I
GT H L
T(AV)
K=[Z
,I ,I [T ] /
-20
(A)
= 180°
th(j-a)
I
GT
Average and D.C. on-state current
versus ambient temperature
(device mounted on FR4 with
recommended pad layout) (DPAK)
Relative variation of thermal
impedance junction to ambient
versus pulse duration
(recommended pad layout, FR4 PC
board for DPAK)
Relative variation of gate trigger
current and holding current versus
junction temperature for TN12 and
TYNx12 series
j
25
/R
1E-1
DPAK
0
I
th(j-a)
GT H L
,I ,I [T =25°C]
D PAK
D.C.
2
20
]
50
1E+0
j
D PAK
T
40
2
T (°C)
amb
t (s)
j
p
DPAK
(°C)
60
75
1E+1
TO-220AB / IPAK
80
100
100
I
H
1E+2
& I
L
120
5E+2
125
140
Figure 4.
Figure 6.
Figure 8.
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.0
0.5
0.2
0.1
1E-2
1E-3
-40
I [R
I
K=[Z
H
GT H L
,I ,I [T ] /
GK
th(j-c)
-20
] / I [
H
Relative variation of thermal
impedance junction to case versus
pulse duration
Relative variation of gate trigger
current and holding current versus
junction temperature for TS12
series
Relative variation of holding
current versus gate-cathode
resistance (typical values) for TS12
series
j
/R
I
GT
R
th(j-c)
0
I
GK
GT H L
=1k ]
,I ,I [T =25°C]
1E-1
1E-2
TN12, TS12 and TYNx12 Series
]
20
j
R
40
T (°C)
GK
t (s)
j
p
(k )
60
1E+0
1E-1
80
R
GK
I
H
& I
= 1k
100
L
T
j
= 25°C
120
1E+0
1E+1
140