74CBTLV16800PAG Integrated Device Technology (Idt), 74CBTLV16800PAG Datasheet - Page 4

• Manufacturer Part Number: 74CBTLV16800PAG
• Description: Bus Switch 2-Element 10-IN 48-Pin TSSOP Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 74CBTLV16800PAG

• Package: 48TSSOP
• Configuration: 10 x 1:1
• Logic Family: CBTLV
• Logic Function: Bus Switch
• Number Of Elements Per Chip: 2
• Number Of Outputs Per Chip: 20
• Typical Operating Supply Voltage: 2.5|3.3 V
• Maximum On Resistance: 35 Ohm
• Maximum High Level Output Current: -128 mA
• Maximum Low Level Output Current: 128 mA
• Maximum Operating Supply Voltage: 3.6 V
• Minimum Operating Supply Voltage: 2.3 V
• Maximum Propagation Delay Time @ Maximum Cl: 0.25@3.3V ns

TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
DEFINITIONS:
C
R
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; t
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; t
Pulse
Generator
SWITCH POSITION
IDT74CBTLV16800
LOW-VOLTAGE 20-BIT BUS SWITCH WITH PRECHARGED OUTPUTS
L
T
Symbol
V
= Load capacitance: includes jig and probe capacitance.
= Termination resistance: should be equal to Z
V
V
LOAD
V
V
C
HZ
LZ
IH
T
L
(1, 2)
t
t
PHZ
PLZ
V
Test
CC
t
PD
V
/t
/t
PZL
PZH
(1)
IN
= 3.3V±0.3V
Test Circuits for All Outputs
300
300
1.5
50
6
3
R
T
D.U.T.
V
CC
V
OUT
V
OUT
CC
F
F
≤ 2ns; t
≤ 2.5ns; t
(2)
of the Pulse Generator.
C
2 x Vcc
Vcc / 2
= 2.5V±0.2V
L
Vcc
150
150
30
Switch
V
R
GND
Open
LOAD
R
≤ 2ns.
500Ω
500Ω
≤ 2.5ns.
GND
V
Open
Unit
mV
mV
pF
LOAD
V
V
V
4
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
INPUT TRANSITION
INPUT TRANSITION
OPPOSITE PHASE
NORMALLY
NORMALLY
CONTROL
OUTPUT
OUTPUT
SAME PHASE
INPUT
HIGH
LOW
OUTPUT
CLOSED
Enable and Disable Times
SWITCH
SWITCH
ENABLE
OPEN
Propagation Delay
t
t
PZH
PZL
INDUSTRIAL TEMPERATURE RANGE
t
t
PLH
PLH
V
V
0V
V
T
T
LOAD/2
t
PHZ
DISABLE
t
t
PHL
PHL
t
PLZ
V
V
0V
V
V
V
V
V
0V
V
0V
V
0V
V
V
V
V
V
IH
T
LOAD/2
OL +
OL
OH
OH -
IH
T
OH
T
OL
IH
T
V
V
HZ
LZ