AD9851BRS Analog Devices Inc, AD9851BRS Datasheet
AD9851BRS
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AD9851BRS Summary of contents
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FEATURES 180 MHz Clock Rate with Selectable 6 Reference Clock Multiplier On-Chip High Performance 10-Bit DAC and High Speed Comparator with Hysteresis SFDR > MHz A OUT 32-Bit Frequency Tuning Word Simplified Control Interface: Parallel or Serial ...
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... Output Jitter (Clock Generator Configuration, 40 MHz 1 V p-p Input Sine Wave) Clock Output Duty Cycle 5 3.9 k, 6 REFCLK Multiplier Disabled, External Reference S SET Clock = 180 MHz, except as noted.) Test AD9851BRS Temp Level Min Full IV 1 Full IV 1 0°C to 85°C ...
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... VI 25°C VI 25°C VI 25°C VI 25°C VI 25°C VI 25°C VI 25°C VI 25°C VI 25°C VI 25°C VI 25°C VI 25°C VI –3– AD9851BRS Min Typ Max Unit 3 SYSCLK Cycles 13 SYSCLK Cycles 3 SYSCLK ...
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... Exposure of absolute maximum rating conditions for extended periods of time may affect device reliability. Model Temperature Range AD9851BRS –40°C to +85°C AD9851BRSRL –40°C to +85°C AD9851/CGPCB AD9851/FSPCB CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection ...
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Pin No. Mnemonic Function 4–1, D0–D7 8-Bit Data Input. The data port for loading the 32-bit frequency and 8-bit phase/control words MSB; 28– LSB. D7, Pin 25, also serves as the input pin for 40-bit serial ...
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AD9851–Typical Performance Characteristics 0 RBW = 5kHz –10 VBW = 5kHz SWT = 7.2s –20 RF ATT = 20dB REF LVL = –7dBm –30 –40 –50 –60 –70 –80 –90 –100 0Hz 7.2MHz/ START TPC 1. Wideband ( ...
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Tek Run 4.00GS/s Sample [ ] T : 208ps @ : 1.940ns 1 M 12.5ns Ch 1 Ch1 200mV D 200ps Runs After TPC 7. Typical CMOS comparator p-p output jitter with the AD9851 configured as a clock generator, ...
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AD9851 –120 AD9851 RESIDUAL PHASE NOISE –125 –130 –135 –140 –145 –150 –155 100 1k FREQUENCY OFFSET – Hz TPC 11. Output Residual Phase Noise (5.2 MHz A REFCLK Multiplier Disabled, System Clock = 180 MHz, Ref- erence Clock = ...
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MAXIMUM DAC I OUT TPC 17. Effect of DAC maximum output current on wideband ( MHz) SFDR at three representa- tive DAC output frequencies: 1.1 MHz, ...
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AD9851 VCA Figure 1. Chip Rate Clock Generator Application in a Spread Spectrum Receiver 8-BIT PARALLEL DATA, MICROPROCESSOR DATA OR 1-BIT 40 SERIAL DATA, OR BUS RESET, W CLK AND FQ UD MICROCONTROLLER 180MHz OR 30MHz ...
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W CLK #1 W CLK # MICROPROCESSOR OR 8-BIT DATA BUS MICROCONTROLLER RESET RESET W CLK #2 W CLK #2 Figure 7. Application Showing Synchronization of Two AD9851 DDSs to Form a Quadrature Oscillator After a ...
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AD9851 REFERENCE CLOCK N PHASE ACCUMULATOR TUNING WORD SPECIFIES OUTPUT FREQUENCY AS A FRACTION OF REF CLOCK FREQUENCY Figure 11. Basic DDS Block Diagram and Signal Flow of AD9851 F OUT 0Hz 20MHz (DC) Figure 12. Output Spectrum of a ...
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In the example shown in Figure 12, the system clock is 100 MHz and the output frequency is set to 20 MHz. As can be seen, the aliased images are very prominent and of a relatively high energy level as ...
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AD9851 the factory test mode. Exit from serial mode to parallel mode is only possible using the RESET command. The function assignments of the data and control words are shown in Tables I and III; the detailed timing sequence for ...
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SYSCLK RESET A OUT Note: The timing diagram above shows the minimal amount of reset time needed before writing to the device. However, the master reset does not have to be synchronous to the SYSCLK if the minimal time is ...
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AD9851 DATA CLK CLK CYCLES 40 CLK CYCLES Figure 19. Serial Load Frequency/Phase Update Sequence Table III. 40-Bit Serial Load Word Functional Assignment W0 Freq–b0 (LSB) W1 Freq–b1 W2 Freq–b2 ...
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PCB LAYOUT INFORMATION The AD9851/CGPCB and AD9851/FSPCB evaluation boards (Figures 22 through 25 and TPCs 1 and 2) represent typical implementations of the AD9851 and exemplify the use of high frequency/high resolution design and layout practices. The print- ed circuit ...
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AD9851 Apply power to AD9851 evaluation board. The AD9851 is pow- ered separately from the other active components on the board via connector marked DUT +V. The connector marked used to power the CMOS latches, optional crystal ...
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J1 C36CPRX 74HCT574 1 RRSET STROBE 14 FFQUD ...
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AD9851 23a. FSPCBTop Layer 23b. FSPCB Power Plane Figure 23. FSPCB Evaluation Board 4-Layer PCB Layout Patterns AD9851/FSPCB Evaluation Board Parts List—GSO 0516(A) Miscellaneous Hardware 1 Amp 552742-1, 36-Pin Plastic, Right Angle, PC Mount, Female 1 Banana Jack–Color Not Important ...
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BANANA 5V JACKS J4 GND AD9851 PGND GND 5 +V PVCC 6 W CLK WCLK FQUD 8 REFCLOCK CLKIN 9 AGND GND ...
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AD9851 25a. CGPCBTop Layer 25b. CGPCB Ground Plane Figure 25. FSPCB Evaluation Board 4-Layer PCB Layout Patterns 25c. CGPCB Power Plane 25d. CGPCB Bottom Layer –22– REV. D ...
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CGPCB Evaluation Board Parts List—GSO 0515(B) Miscellaneous Hardware 1 Amp 552742-1, 36-Pin Plastic, Right Angle, PC Mount, Female 1 Banana Jack—Color Not Important 1 Yellow Banana Jack 1 Black Banana Jack 5 BNC Coax. Connector, PC Mount 1 AD9851/CGPCB Evaluation ...
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AD9851 28 1 2.00 MAX 0.65 0.05 BSC MIN Revision History Location 1/04—Data Sheet changed from REV REV. D Renumbered figures and TPCs . . . . . . . . . . . . . . . ...