74LVC126APW-T NXP Semiconductors, 74LVC126APW-T Datasheet - Page 11
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74LVC126APW-T
Manufacturer Part Number
74LVC126APW-T
Description
Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC126APWDG118.pdf
(16 pages)
Specifications of 74LVC126APW-T
Package
14TSSOP
Logic Family
LVC
Logic Function
Buffer/Line Driver
Number Of Outputs Per Chip
4
Output Type
3-State
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.7(Typ)@2.7V|2.4(Typ)@3.3V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
Philips Semiconductors
Fig 10. Package outline SOT337-1 (SSOP14)
74LVC126A_6
Product data sheet
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
OUTLINE
VERSION
SOT337-1
max.
A
2
0.21
0.05
A
1
Z
14
1
1.80
1.65
A
y
2
IEC
e
pin 1 index
0.25
A
3
D
0.38
0.25
b
p
0.20
0.09
b
MO-150
JEDEC
p
c
8
7
REFERENCES
D
6.4
6.0
w
Rev. 06.00 — 16 May 2006
0
(1)
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
M
E
5.4
5.2
(1)
c
JEITA
scale
2.5
0.65
e
H
7.9
7.6
E
A
2
A
5 mm
1.25
1
L
1.03
0.63
L
E
H
p
E
detail X
0.9
0.7
Q
L
L
p
PROJECTION
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Q
EUROPEAN
0.2
v
(A )
3
A
0.13
74LVC126A
w
θ
A
0.1
X
y
v
ISSUE DATE
M
99-12-27
03-02-19
A
Z
1.4
0.9
(1)
SOT337-1
8
0
θ
o
o
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