8523BGLF Integrated Device Technology (Idt), 8523BGLF Datasheet - Page 10

• Manufacturer Part Number: 8523BGLF
• Description: Clock Driver 2-IN HSTL 20-Pin TSSOP Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 8523BGLF

• Package: 20TSSOP
• Configuration: 1 x 2:1
• Input Signal Type: CML|HCSL|HSTL|LVDS|LVPECL|SSTL
• Maximum Output Frequency: 650 MHz
• Operating Supply Voltage: 3.3 V

ICS8523 Data Sheet
3.3V LVPECL Clock Input Interface
The PCLK /nPCLK accepts LVPECL, CML, SSTL and other
differential signals. Both signals must meet the V
requirements. Figures 4A to 4E show interface examples for the
PCLK/ nPCLK input driven by the most common driver types. The
Figure 4A. PCLK/nPCLK Input Driven by a CML Driver
Figure 4C. PCLK/nPCLK Input Driven by a
Figure 4E. PCLK/nPCLK Input Driven by an SSTL Driver
ICS8523CG REVISION E JANUARY 24, 2011
3.3V
2.5V
3.3V
LVPECL
SSTL
CML
3.3V LVPECL Driver
Zo = 50Ω
Zo = 50Ω
Zo = 60Ω
Zo = 60Ω
Zo = 50Ω
Zo = 50Ω
R3
125Ω
3.3V
R3
120Ω
R1
84Ω
2.5V
R1
120Ω
R1
50Ω
3.3V
R4
125Ω
R4
120Ω
R2
84Ω
R2
120Ω
R2
50Ω
PCLK
nPCLK
PP
PCLK
nPCLK
PCLK
nPCLK
3.3V
and V
LVPECL
Input
3.3V
3.3V
LVPECL
Input
LVPECL
Input
CMR
input
10
input interfaces suggested here are examples only. If the driver is
from another vendor, use their termination recommendation. Please
consult with the vendor of the driver component to confirm the driver
termination requirements.
Figure 4B. PCLK/nPCLK Input Driven by a
Figure 4D. PCLK/nPCLK Input Driven by a
3.3V
3.3V
CML Built-In Pullup
3.3V LVPECL
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-HSTL FANOUT BUFFER
Built-In Pullup CML Driver
3.3V LVPECL Driver with AC Couple
R5
100 - 200
R6
100 - 200
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
©2011 Integrated Device Technology, Inc.
C1
C2
R1
100Ω
R3
84
3.3V
R1
125
R4
84
R2
125
PCLK
nPCLK
PCLK
nPCLK
3.3V
3.3V
LVPECL
Input
LVPECL
Input