8545BGLF Integrated Device Technology (Idt), 8545BGLF Datasheet - Page 2

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8545BGLF

Manufacturer Part Number
8545BGLF
Description
Clock Driver 2-IN LVDS 20-Pin TSSOP Tube
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 8545BGLF

Package
20TSSOP
Configuration
1 x 2:1
Input Signal Type
LVCMOS|LVTTL
Maximum Output Frequency
650 MHz
Operating Supply Voltage
3.3 V

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Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
IDT™ / ICS™ LVDS FANOUT BUFFER
Symbol
C
R
R
ICS8545
LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
IN
PULLUP
PULLDOWN
Number
1, 9, 13
10, 18
11, 12
14, 15
16, 17
19, 20
5, 7
2
3
4
6
8
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
CLK_SEL
CLK_EN
Q3, Q3
Q2, Q2
Q1, Q1
Q0, Q0
Name
CLK1
CLK2
GND
V
OE
nc
DD
Unused
Output
Output
Output
Output
Power
Power
Input
Input
Input
Input
Input
Type
Pulldown
Pulldown
Pulldown
Pullup
Pullup
Test Conditions
Description
Power supply ground.
Synchronizing clock enable. When HIGH, clock outputs follows clock input.
When LOW, Q outputs are forced low, Q outputs are forced high.
LVCMOS / LVTTL interface levels.
Clock select input. When HIGH, selects CLK2 input.
When LOW, selects CLK1 input. LVCMOS / LVTTL interface levels.
Single-ended clock input. LVCMOS/LVTTL interface levels.
No connect.
Single-ended clock input. LVCMOS/LVTTL interface levels.
Output enable. Controls enabling and disabling of outputs Q0/Q0 through
Q3/Q3. LVCMOS/LVTTL interface levels.
Positive supply pins.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
2
Minimum
ICS8545BG REV. D OCTOBER 28, 2008
Typical
51
51
4
Maximum
Units
k
k
pF

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