MPC9447FA Integrated Device Technology (Idt), MPC9447FA Datasheet - Page 8

• Manufacturer Part Number: MPC9447FA
• Description: Clock Driver 2-IN LVCMOS 32-Pin TQFP Tray
• Manufacturer: Integrated Device Technology (Idt)

Specifications of MPC9447FA

• Package: 32TQFP
• Configuration: 1 x 2:1
• Input Signal Type: LVCMOS
• Maximum Output Frequency: 350 MHz
• Maximum Quiescent Current: 2 mA
• Operating Supply Voltage: 2.5|3.3 V

MPC9447 Data Sheet
MPC9447 REVISION 6 APRIL 13, 2010
The variation in cycle time of a signal between adjacent cycles,
over a random sample of adjacent cycle pairs.
The time from the output controlled edge to the non-controlled edge,
divided by the time between output controlled edges, expressed as
a percentage.
The pin-to-pin skew is defined as the worst case difference in
propagation delay between any similar delay path within a single
device.
Figure 9. Output-to-Output Skew t
Figure 11. Output Duty Cycle (DC)
Figure 13. Cycle-to-Cycle Jitter
T
N
t
P
T
N+1
T
DC = (t
0
t
SK(LH)
P ?
T
T
0
JIT(CC)
x 100%)
Figure 8. Propagation Delay (t
CCLK
= |T
Q
SK(LH, HL)
N
X
t
SK(HL)
-T
N+1
V
V
GND
|
CC
CC
V
V
GND
V
V
GND
÷2
CC
CC
CC
CC
t
P(LH)
÷2
÷2
8
t
P(HL)
PD
Figure 14. Setup and Hold Time (t
Figure 10. Output Pulse Skew (t
) Test Reference
CLK_STOP
Figure 12. Output Transition Time Test Reference
CCLK
Q
t
CCLK
PCLK
F
X
V
V
GND
V
V
GND
CC
CC
CC
CC
÷2
÷2
t
P(LH)
3.3V, 2.5V, 1:9 LVCMOS CLOCK FANOUT BUFFER
t
SK(P)
t
= | t
S
©2010 Integrated Device Technology, Inc.
PLH
t
t
H
t
– t
R
P(HL)
PHL
SK(P)
V
S
|
CC
, t
0.55
=3.3 V
2.4
H
) Test Reference
) Test Reference
V
CC
1.8 V
0.6 V
=2.5 V
V
V
GND
V
V
GND
CC
CC
CC
CC
÷2
÷2
V
V
GND
V
V
GND
CC
CC
CC
CC
÷2
÷2