74HC74PW-T NXP Semiconductors, 74HC74PW-T Datasheet - Page 12
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74HC74PW-T
Manufacturer Part Number
74HC74PW-T
Description
Flip Flop D-Type Pos-Edge 2-Element 14-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet
1.74HCT2G17GW125.pdf
(22 pages)
Specifications of 74HC74PW-T
Package
14TSSOP
Logic Function
D-Type
Logic Family
HC
Number Of Element Outputs
1
Number Of Elements Per Chip
2
Input Signal Type
Single-Ended
Output Signal Type
Differential
Set/reset
Set/Reset
Typical Operating Supply Voltage
5 V
Operating Temperature
-40 to 125 °C
Philips Semiconductors
Family 74HCT
GND = 0 V; t
2003 Jul 10
T
t
t
t
t
t
t
f
T
t
t
t
t
t
t
f
PHL
THL
W
rem
su
h
max
PHL
THL
W
rem
su
h
max
amb
amb
Dual D-type flip-flop with set and reset;
positive-edge trigger
SYMBOL
/t
/t
/t
/t
TLH
TLH
PLH
PLH
= 40 to +85 C
= 40 to +125 C
r
= t
propagation
delay nCP to nQ, nQ
propagation
delay nSD to nQ, nQ
propagation
delay nRD to nQ, nQ
output transition time
clock pulse width HIGH
or LOW
set or reset pulse width
LOW
removal time set or
reset
set-up time nD to nCP
hold time nCP to nD
maximum clock pulse
frequency
propagation
delay nCP to nQ, nQ
propagation
delay nSD to nQ, nQ
propagation
delay nRD to nQ, nQ
output transition time
clock pulse width HIGH
or LOW
set or reset pulse width
LOW
removal time set or
reset
set-up time nD to nCP
hold time nCP to nD
maximum clock pulse
frequency
f
= 6 ns; C
PARAMETER
L
= 50 pF.
see Fig.7
see Fig.8
see Fig.8
see Fig.7
see Fig.7
see Fig.8
see Fig.8
see Fig.7
see Fig.7
see Fig.7
see Fig.7
see Fig.8
see Fig.8
see Fig.7
see Fig.7
see Fig.8
see Fig.8
see Fig.7
see Fig.7
see Fig.7
WAVEFORMS
TEST CONDITIONS
12
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
V
CC
(V)
23
20
8
15
+3
22
27
24
9
18
3
18
MIN.
74HC74; 74HCT74
18
23
24
7
9
9
1
5
54
3
TYP.
Product specification
44
50
50
19
53
60
60
22
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
UNIT