74HCT574D NXP Semiconductors, 74HCT574D Datasheet - Page 2

• Manufacturer Part Number: 74HCT574D
• Description: Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SO Bulk
• Manufacturer: NXP Semiconductors

Specifications of 74HCT574D

• Package: 20SO
• Logic Function: D-Type Bus Interface
• Logic Family: HCT
• Number Of Element Outputs: 8
• Output Signal Type: Single-Ended
• Output Type: 3-State
• Number Of Output Enables Per Element: 1
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: -40 to 125 °C
• Flip-flop Type: D
• Propagation Delay: 18ns
• Frequency: 123MHz
• Output Current: 6mA
• Supply Voltage Range: 4.5V To 5.5V
• Logic Case Style: SOIC
• No. Of Pins: 20
• Operating: RoHS Compliant
• Trigger Type: Positive Edge
• Ic Output Type: Tri State Non Inverted
• Rohs Compliant: Yes

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
December 1990
SYMBOL
t
f
C
C
PHL/
max
3-state non-inverting outputs for
bus oriented applications
8-bit positive edge-triggered
register
Common 3-state output enable
input
Independent register and 3-state
buffer operation
Output capability: bus driver
I
Octal D-type flip-flop; positive
edge-trigger; 3-state
I
PD
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
CC
PD
= input frequency in MHz
L
t
category: MSI
= output frequency in MHz
(C
PLH
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
PD
PARAMETER
propagation delay CP to Q
maximum clock frequency
input capacitance
power dissipation capacitance per flip-flop
2
= 25 C; t
V
f
o
CC
) = sum of outputs
2
f
r
i
= t
I
I
f
= GND to V
= GND to V
= 6 ns
(C
L
V
CC
GENERAL DESCRIPTION
The 74HC/HCT574 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard
no. 7A.
The 74HC/HCT574 are octal D-type
flip-flops featuring separate D-type
inputs for each flip-flop and
non-inverting 3-state outputs for bus
oriented applications. A clock (CP)
and an output enable (OE) input are
common to all flip-flops.
n
2
CC
CC
f
o
) where:
1.5 V
2
.
D
CONDITIONS
C
notes 1 and 2
in W):
L
= 15 pF; V
CC
= 5 V
The 8 flip-flops will store the state of
their individual D-inputs that meet the
set-up and hold time requirements on
the LOW-to-HIGH CP transition.
When OE is LOW, the contents of the
8 flip-flops are available at the
outputs.
When OE is HIGH, the outputs go to
the high impedance OFF-state.
Operation of the OE input does not
affect the state of the flip-flops.
The “574” is functionally identical to
the “564”, but has non-inverting
outputs.
The “574” is functionally identical to
the “374”, but has a different pinning.
HC
14
123
3.5
22
74HC/HCT574
TYPICAL
Product specification
HCT
15
76
3.5
25
UNIT
ns
MHz
pF
pF