S71PL064JA0BFW0B0 Spansion Inc., S71PL064JA0BFW0B0 Datasheet
![no-image](/images/manufacturer_photos/0/6/621/spansion_inc__sml.jpg)
S71PL064JA0BFW0B0
Specifications of S71PL064JA0BFW0B0
Related parts for S71PL064JA0BFW0B0
S71PL064JA0BFW0B0 Summary of contents
Page 1
S71PL-J Based MCPs Data Sheet (Retired Product) This product has been retired and is not recommended for new designs. For new designs, S71GL-A or S71GL-N supersedes S71PL-J. Please contact your local Spansion sales office to determine the appropriate migration device, ...
Page 2
S71PL-J Based MCPs S71PL-J_00_B6 February 17, 2010 ...
Page 3
S71PL-J Based MCPs Stacked Multi-Chip Product (MCP) Flash Memory and RAM 256M/128/64/32 Megabit (16/8/4/2M x 16-bit) CMOS 3.0 Volt-only Simultaneous Operation Page Mode Flash Memory and 64/32/16/8/4 Megabit (4M/2M/1M/512K/256K x 16-bit) Static RAM/pSRAM Data Sheet Note: This product has been ...
Page 4
For detailed specifications, please refer to the individual data sheets listed in the following table pSRAM Type pSRAM Type 3 4 Mb/8 Mb SRAM Type SRAM Type pSRAM Type ...
Page 5
Product Selector Guide 1 Flash Memory Device-Model# Flash Access time (ns) S71PL032J04-0B S71PL032J04-0K S71PL032J40-0K S71PL032J08-0B S71PL032J80-0F S71PL032J80-Q7 S71PL032J80-QF S71PL032JA0-0K S71PL032JA0-QF S71PL032JA0-0Z 1 Flash Memory Device-Model# Flash Access time (ns) S71PL064J80-07 S71PL064J0A-0S S71PL064JA0-0Z S71PL064JA0-0B S71PL064JA0-07 S71PL064JA0-0P ...
Page 6
MCP Block Diagram CE#f1 WP#/ACC RESET# Flash-only Address Shared Address OE# WE# CE#f2 (Note 1) CE#s UB#s LB#s CE2 Notes 1. For 1 Flash + pSRAM, CE#f1=CE#. For 2 Flash + pSRAM, CE#=CE#f1 and CE#f2 is the chip-enable for ...
Page 7
Connection Diagrams CE1#f G1 CE1#s Notes 1. May be shared depending on density. – A19 is shared for the 16M pSRAM configuration. – A18 is shared for the 8M pSRAM ...
Page 8
CE1#f CE1#s Notes 1. May be shared depending on density. – A20 is shared for the 32M pSRAM configuration. – A19 is shared for the 16M pSRAM and above configurations. – A18 is shared for the 8M pSRAM and above ...
Page 9
CE#f J2 CE1 Notes 1. May be shared depending on density. – A21 is shared for the 64M pSRAM configuration. – A20 is shared for the 32M ...
Page 10
A1 NC CE1 Notes 1. May be shared depending on density. – A21 is shared for the 64M pSRAM configuration. – A20 is shared for the 32M pSRAM configuration. MCP S71PL254JC0 2. Connecting all V & ...
Page 11
Pin Description Signal A21–A0 22 Address Inputs (Common) DQ15–DQ0 16 Data Inputs/Outputs (Common) CE1#f Chip Enable 1 (Flash) CE#f2 Chip Enable 2 (Flash) CE1#ps Chip Enable 1 (pSRAM) CE2ps Chip Enable 2 (pSRAM) OE# Output Enable (Common) WE# Write ...
Page 12
Ordering Information The order number is formed by a valid combinations of the following: S71PL 127 J 6.1 Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to ...
Page 13
Base Ordering Package & Part Number Temperature S71PL032J04 S71PL032J04 S71PL032J40 S71PL032J80 S71PL032J08 S71PL032J80 S71PL032J80 S71PL032JA0 S71PL032JA0 S71PL032JA0 S71PL032J04 S71PL032J04 S71PL032J40 S71PL032J80 S71PL032J08 S71PL032J80 S71PL032J80 S71PL032JA0 S71PL032JA0 S71PL032JA0 Base Ordering Package & Part Number Temperature S71PL064J80 S71PL064J0A S71PL064JA0 S71PL064JA0 BAW S71PL064JA0 ...
Page 14
Base Ordering Package & Part Number Temperature S71PL127JB0 S71PL127JB0 S71PL127JC0 S71PL127JC0 S71PL127JC0 S71PL127JB0 S71PL127JB0 S71PL127JB0 S71PL127JC0 S71PL127JC0 S71PL127JC0 S71PL127JB0 Notes 1. Type 0 is standard. Specify other options as required. 2. BGA package marking omits leading “S” and packing type ...
Page 15
Physical Dimensions TLC056—56-ball Fine-Pitch Ball Grid Array (FBGA Package 0.15 C (2X) INDEX MARK PIN A1 CORNER 56X 0.15 M 0.08 M PACKAGE TLC 056 JEDEC N ...
Page 16
TSC056—56-ball Fine-Pitch Ball Grid Array (FBGA Package 0.15 C (2X) INDEX MARK PIN A1 CORNER 56X 0.15 0.08 PACKAGE TSC 056 JEDEC N 9. 7.00 mm ...
Page 17
TLA064—64-ball Fine-Pitch Ball Grid Array (FBGA 11.6 mm Package 0.15 C (2X) INDEX MARK PIN A1 CORNER 64X 0. 0. PACKAGE TLA 064 JEDEC N/A D ...
Page 18
TSB064—64-ball Fine-Pitch Ball Grid Array (FBGA 11.6 mm Package 0.15 C (2X) INDEX MARK PIN A1 CORNER 64X 0.15 0.08 PACKAGE TSB 064 JEDEC N 11. 8.00 mm ...
Page 19
FTA084—84-ball Fine-Pitch Ball Grid Array (FBGA 11.6 mm Package 0.15 C (2X) INDEX MARK PIN A1 CORNER 84X 0. 0. PACKAGE FTA 084 JEDEC N ...
Page 20
Revision History Section Revision A (May 3, 2004) Initial release Revision A1 (May 6, 2004) Features Corrected the high performance access times. Connection Diagrams Added reference points on all diagrams. Corrected package types. Ordering Information Corrected the description of ...
Page 21
Section Added 254M to Megabit indicator. S71PL-J Based MCPs Added 16 to CMOS indicator Revision A5 (September 14, 2004) Product Selector Guide Updated the 128Mb Flash Memory table. Valid Combinations Table Updated the S71PL127J Valid Combinations table. Revision A6 (November ...
Page 22
... Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2004-2010 Spansion Inc. All rights reserved. Spansion EcoRAM™ and combinations thereof, are trademarks and registered trademarks of Spansion LLC in the United States and other countries. ...