MT46V32M16P-6T:F Micron Technology Inc, MT46V32M16P-6T:F Datasheet - Page 20

DRAM Chip DDR SDRAM 512M-Bit 32Mx16 2.5V 66-Pin TSOP Tray

MT46V32M16P-6T:F

Manufacturer Part Number
MT46V32M16P-6T:F
Description
DRAM Chip DDR SDRAM 512M-Bit 32Mx16 2.5V 66-Pin TSOP Tray
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46V32M16P-6T:F

Density
512 Mb
Maximum Clock Rate
333 MHz
Package
66TSOP
Address Bus Width
15 Bit
Operating Supply Voltage
2.5 V
Maximum Random Access Time
0.7 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
512M (32Mx16)
Speed
6ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Package / Case
66-TSOP
Organization
32Mx16
Address Bus
15b
Access Time (max)
700ps
Operating Supply Voltage (typ)
2.5V
Package Type
TSOP
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Supply Current
195mA
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
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Figure 10:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Transmitter
Input Voltage Waveform
Notes:
1. V
2. V
3. Numbers in diagram reflect nominal values utilizing circuit below for all devices other than
-5B.
OH
OL
(MAX) with test load is 0.373V.
(MIN) with test load is 1.927V.
25Ω
V
V
V
VssQ
OL
DD
OH
1.560V
1.400V
1.300V
1.275V
1.250V
1.225V
1.200V
1.100V
0.940V
V
V
IN
Q (2.3V MIN)
System noise margin (power/ground,
crosstalk, signal integrity attenuation)
(MIN) (1.670V
(MAX) (0.83V
(
TT
AC
between
and
25Ω
) - provides margin
V
termination)
IL
(
AC
V
)
2
OL
1
for SSTL_2
for SSTL_2 termination)
Reference
point
(MAX)
20
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Electrical Specifications – DC and AC
512Mb: x4, x8, x16 DDR SDRAM
Receiver
©2000 Micron Technology, Inc. All rights reserved.
V
V
V
V
V
V
V
V
IH
IH
REF
REF
REF
REF
IL
IL
(
(
(
(
DC
AC
AC
DC
+ AC noise
+ DC error
- DC error
- AC noise
)
)
)
)

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