MT48LC16M16A2BG-75 IT:D Micron Technology Inc, MT48LC16M16A2BG-75 IT:D Datasheet - Page 75
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MT48LC16M16A2BG-75 IT:D
Manufacturer Part Number
MT48LC16M16A2BG-75 IT:D
Description
DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Specifications of MT48LC16M16A2BG-75 IT:D
Density
256 Mb
Maximum Clock Rate
133 MHz
Package
54VFBGA
Address Bus Width
15 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
6|5.4 ns
Operating Temperature
-40 to 85 °C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
256M (16Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
54-VFBGA
Organization
16Mx16
Address Bus
15b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 44: Single READ Without Auto Precharge
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Command
BA0, BA1
Address
DQM
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
Bank
Row
Row
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
t CK
Note:
T1
NOP
1. For this example, BL = 1, CL = 2, and the READ burst is followed by a manual PRECHARGE.
Disable auto precharge
t CL
t CMS
Column m
T2
Bank
READ
t CMH
t CH
CL = 2
T3
NOP
t LZ
t AC
75
T4
NOP
D
t OH
OUT
t HZ
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Single bank
PRECHARGE
All banks
Bank(s)
T5
256Mb: x4, x8, x16 SDRAM
T6
t RP
NOP
PRECHARGE Operation
© 1999 Micron Technology, Inc. All rights reserved.
ACTIVE
Bank
Row
Row
T7
T8
NOP
Don’t Care
Undefined