MT48LC16M16A2TG-7E IT:D Micron Technology Inc, MT48LC16M16A2TG-7E IT:D Datasheet - Page 65
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MT48LC16M16A2TG-7E IT:D
Manufacturer Part Number
MT48LC16M16A2TG-7E IT:D
Description
DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC16M16A2TG-7E_ITD.pdf
(87 pages)
Specifications of MT48LC16M16A2TG-7E IT:D
Density
256 Mb
Maximum Clock Rate
143 MHz
Package
54TSOP-II
Address Bus Width
15 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
5.4 ns
Operating Temperature
-40 to 85 °C
Organization
16Mx16
Address Bus
15b
Access Time (max)
5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
Figure 36: Alternating Bank Write Accesses
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Command
BA0, BA1
Address
DQM
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
Bank 0
ACTIVE
T0
Row
Row
t CKH
t CMH
t AH
t AH
t AH
t RCD - bank 0
t RAS - bank 0
t RC - bank 0
t RRD
t CK
T1
Note:
NOP
Enable auto precharge
t CMS
t CL
1. For this example, BL = 4.
Column m
t DS
Bank 0
WRITE
T2
D
t CMH
IN
t DH
t CH
t DS
T3
NOP
D
IN
t DH
t DS
Bank 1
ACTIVE
Row
T4
Row
D
IN
t DH
65
t RCD - bank 1
t DS
T5
D
NOP
IN
t DH
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t WR - bank 0
Enable auto precharge
t DS
Column b
Bank 1
WRITE
T6
D
IN
t DH
256Mb: x4, x8, x16 SDRAM
t DS
T7
NOP
D
IN
t DH
© 1999 Micron Technology, Inc. All rights reserved.
t RP - bank 0
WRITE Operation
t DS
T8
NOP
D
IN
t DH
t DS
Bank 0
Row
Row
T9
ACTIVE
D
t RCD - bank 0
t WR - bank 1
IN
t DH
Don’t Care