MT48LC8M16A2P-75:G TR Micron Technology Inc, MT48LC8M16A2P-75:G TR Datasheet - Page 55
MT48LC8M16A2P-75:G TR
Manufacturer Part Number
MT48LC8M16A2P-75:G TR
Description
DRAM Chip SDRAM 128M-Bit 8Mx16 3.3V 54-Pin TSOP-II T/R
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC8M16A2P-75G_TR.pdf
(74 pages)
Specifications of MT48LC8M16A2P-75:G TR
Package
54TSOP-II
Density
128 Mb
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Clock Rate
133 MHz
Maximum Random Access Time
6|5.4 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
128M (8Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
54-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1217-2
MT48LC8M16A2P-75:G TR
MT48LC8M16A2P-75:G TR
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Figure 39:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
A0–A9, A11
COMMAND
DQM /
BA0, BA1
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
COLUMN m
READ
T0
BANK
Clock Suspend Mode
t CMH
t CKH
t AH
t AH
t AH
2
Notes:
t CMS
t CK
T1
NOP
t CMH
1. For this example, BL = 2, CL = 3, and auto precharge is disabled.
2. x16: A9 and A11 = “Don’t Care.”
x8: A11 = “Don’t Care.”
t CL
t CKS t CKH
T2
NOP
t LZ
t CH
t AC
T3
D
OUT
m
T4
NOP
55
t OH
t AC
D
T5
OUT
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
m + 1
t HZ
T6
NOP
128Mb: x4, x8, x16 SDRAM
COLUMN e 2
t DS
BANK
WRITE
D
T7
IN
e
t DH
©1999 Micron Technology, Inc. All rights reserved.
Timing Diagrams
T8
D
DON’T CARE
UNDEFINED
IN
T9
NOP
e + 1
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