72V2113L7-5BCI Integrated Device Technology (Idt), 72V2113L7-5BCI Datasheet - Page 11

no-image

72V2113L7-5BCI

Manufacturer Part Number
72V2113L7-5BCI
Description
FIFO Mem Sync Dual Depth/Width Uni-Dir 256K x 18/512K x 9 100-Pin CABGA
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 72V2113L7-5BCI

Package
100CABGA
Configuration
Dual
Bus Directional
Uni-Directional
Density
4.5 Mb
Organization
256Kx18|512Kx9
Data Bus Width
18|9 Bit
Timing Type
Synchronous
Expansion Type
Depth|Width
Typical Operating Supply Voltage
3.3 V
Operating Temperature
-40 to 85 °C
AC TEST CONDITIONS
NOTE:
1. For 166MHz and 133MHz operation input rise/fall times are 1.5ns.
AC TEST LOADS - 10ns, 15ns Speed Grades
OUTPUT ENABLE & DISABLE TIMING
Normally
Normally
NOTE:
1. REN is HIGH.
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II
131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9
Output
Output
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load for t
Output Load for t
HIGH
LOW
V
V
OE
2
2
CC
CC
CLK
D.U.T.
CLK
* Includes jig and scope capacitances.
= 6ns, 7.5ns
= 10ns, 15 ns
Figure 2a. Output Load
510Ω
Enable
Output
100mV
100mV
t
OE &
3.3V
t
OLZ
330Ω
30pF*
6119 drw04
See Figure 2b & 2c
See Figure 2a
GND to 3.0V
3ns
1.5V
1.5V
Disable
Output
TM
(1)
NARROW BUS FIFO
100mV
t
OHZ
TM
11
NARROW BUS FIFO
AC TEST LOADS - 6ns, 7.5ns Speed Grades
Figure 2c. Lumped Capacitive Load, Typical Derating
100mV
I/O
6
5
4
3
2
1
20 30 50
Figure 2b. AC Test Load
Capacitance (pF)
6119 drw04c
Z
0
80 100
= 50
V
V
V
V
V
V
CC
2
CC
2
IL
OH
IH
OL
COMMERCIAL AND INDUSTRIAL
Ω
50
Ω
TEMPERATURE RANGES
1.5V
6119 drw04a
6119 drw04b
200
JUNE 1, 2010

Related parts for 72V2113L7-5BCI