ATMEGA64A-MU Atmel, ATMEGA64A-MU Datasheet - Page 5
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ATMEGA64A-MU
Manufacturer Part Number
ATMEGA64A-MU
Description
MCU 8-Bit ATmega AVR RISC 64KB Flash 3.3V/5V 64-Pin MLF EP
Manufacturer
Atmel
Datasheet
1.ATMEGA64A-MUR.pdf
(21 pages)
Specifications of ATMEGA64A-MU
Package
64MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Ram Size
4 KB
Program Memory Size
64 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA64A-MU
Manufacturer:
Atmel
Quantity:
5 200
2.2.1
2.3
2.3.1
2.3.2
2.3.3
2.3.4
8160CS–AVR–07/09
Pin Descriptions
ATmega103 Compatibility Mode
VCC
GND
Port A (PA7:PA0)
Port B (PB7:PB0)
By programming the M103C Fuse, the ATmega64A will be compatible with the ATmega103
regards to RAM, I/O pins and Interrupt Vectors as described above. However, some new fea-
tures in ATmega64A are not available in this compatibility mode, these features are listed below:
Digital supply voltage.
Ground.
Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port A also serves the functions of various special features of the ATmega64A as listed on
75.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
• One USART instead of two, asynchronous mode only. Only the eight least significant bits of
• One 16 bits Timer/Counter with two compare registers instead of two 16 bits Timer/Counters
• Two-wire serial interface is not supported.
• Port G serves alternate functions only (not a general I/O port).
• Port F serves as digital input only in addition to analog input to the ADC.
• Boot Loader capabilities is not supported.
• It is not possible to adjust the frequency of the internal calibrated RC Oscillator.
• The External Memory Interface can not release any Address pins for general I/O, neither
• Only EXTRF and PORF exist in the MCUCSR Register.
• No timed sequence is required for Watchdog Timeout change.
• Only low-level external interrupts can be used on four of the eight External Interrupt sources.
• Port C is output only.
• USART has no FIFO buffer, so Data OverRun comes earlier.
• The user must have set unused I/O bits to 0 in ATmega103 programs.
the Baud Rate Register is available.
with three compare registers.
configure different wait states to different External Memory Address sections.
ATmega64A
page
5