ISPLSI 1048EA-100LT128 LATTICE SEMICONDUCTOR, ISPLSI 1048EA-100LT128 Datasheet - Page 10

• Manufacturer Part Number: ISPLSI 1048EA-100LT128
• Description: CPLD ispLSI® 1000EA Family 8K Gates 192 Macro Cells 100MHz EECMOS Technology 5V 128-Pin TQFP
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPLSI 1048EA-100LT128

• Package: 128TQFP
• Family Name: ispLSI® 1000EA
• Device System Gates: 8000
• Number Of Macro Cells: 192
• Maximum Propagation Delay Time: 12.5 ns
• Number Of User I/os: 96
• Number Of Logic Blocks/elements: 48
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 100 MHz
• Operating Temperature: 0 to 70 °C

Power consumption in the ispLSI 1048EA device de-
pends on two primary factors: the speed at which the
device is operating and the number of Product Terms
Figure 4. Typical Device Power Consumption vs fmax
For the ispLSI 1048EA-170, it is strongly recommended
that the actual Icc be verified to ensure that the maximum
junction temperature (T
exceeded. Depending on the specific logic design and
clock speed, airflow may be required to satisfy the maxi-
Icc can be estimated for the ispLSI 1048EA using the following equation:
Icc = 20mA + (# of PTs * .45) + (# of nets * Max Freq * .0087)
Where:
The Icc estimate is based on typical conditions (Vcc = 5.0V, room temperature) and an assumption of four GLB
loads on average exists. These values are for estimates only. Since the value of Icc is sensitive to operating
conditions and the program in the device, the actual Icc should be verified.
Maximum GRP Delay vs. GLB Loads
Power Consumption
Package Thermal Characteristics
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
J
) with power supplied is not
500
400
300
200
100
Notes: Configuration of twelve 16-bit counters, Typical current at 5V, 25¡C
5
4
3
2
1
1
0
4
25
8
50
16
GLB Load
75
fmax (MHz)
10
used. Figure 4 shows the relationship between power
and operating speed.
mum allowable junction temperature (T
Please refer to the Thermal Management section of the
Lattice Semiconductor Data Book or CD-ROM for addi-
tional information on calculating T
100
Specifications ispLSI 1048EA
32
GRP/GLB/1048EA
ispLSI 1048EA
125
150
48
ispLSI 1048EA-100
ispLSI 1048EA-125
ispLSI 1048EA-170
175
J
.
J
) specification.
0127/1048EA