XC2C256-7CPG132I Xilinx Inc, XC2C256-7CPG132I Datasheet - Page 22

• Manufacturer Part Number: XC2C256-7CPG132I
• Description: CPLD CoolRunner™-II Family 6K Gates 256 Macro Cells 152MHz 0.18um (CMOS) Technology 1.8V 132-Pin CSBGA
• Manufacturer: Xilinx Inc
• Series: CoolRunner IIr

Specifications of XC2C256-7CPG132I

• Package: 132CSBGA
• Family Name: CoolRunner™-II
• Device System Gates: 6000
• Number Of Macro Cells: 256
• Maximum Propagation Delay Time: 7.5 ns
• Number Of User I/os: 106
• Number Of Logic Blocks/elements: 16
• Typical Operating Supply Voltage: 1.8 V
• Maximum Operating Frequency: 152 MHz
• Number Of Product Terms Per Macro: 40
• Operating Temperature: -40 to 85 °C
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 6.7ns
• Voltage Supply - Internal: 1.7 V ~ 1.9 V
• Number Of Logic Elements/blocks: 16
• Number Of Macrocells: 256
• Number Of Gates: 6000
• Number Of I /o: 106
• Mounting Type: Surface Mount
• Package / Case: 132-CSBGA
• Features: Programmable
• Voltage: 1.8V
• Memory Type: CMOS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1573 - KIT STARTER COOLRUNNER-II LP/LC122-1512 - KIT DESIGN CPLD W/BATT HOLDER
• Number Of Logic Elements/cells: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XC2C256 CoolRunner-II CPLD
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
22
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I/O
I/O
I/O
NC
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I/O
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NC
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NC
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I/O
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I/O
NC
NC
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I/O
I/O
I/O
I/O
I/O
I/O
I/O
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VCC
NC
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I/O
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I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
TMS
TCK
NC
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Figure 10: FT256 Fine Pitch Thin BGA
VCCIO2
VCCIO1
VCCIO1
GND
GND
NC
TDI
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCCIO2
VCCIO1
FT256 Bottom View
TDO
GND
GND
GND
GND
I/O
I/O
I/O
I/O
NC
I/O
I/O
I/O
I/O
www.xilinx.com
VCCIO2 VCCIO2 VCCIO2
VCCIO1 VCCIO1 VCCIO1
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
NC
I/O
NC
I/O
NC
GND
GND
GND
GND
I/O
I/O
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I/O
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I/O
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GND
GND
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NC
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I/O
VCCIO2
VCCIO2
VCCIO1
VCCIO1
GND
GND
NC
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O(1)
I/O(2)
VCC
I/O
I/O
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VAUX
I/O(3)
I/O(1)
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
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I/O
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
(4) - Clock Divide Reset
(5) - DataGATE Enable
DS094 (v3.2) March 8, 2007
I/O(1)
I/O(1)
I/O(2)
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Product Specification
I/O(2)
I/O(4)
I/O(5)
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
NC
NC
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
R