XC2S400E-6FG456I Xilinx Inc, XC2S400E-6FG456I Datasheet - Page 108

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XC2S400E-6FG456I

Manufacturer Part Number
XC2S400E-6FG456I
Description
FPGA Spartan®-IIE Family 400K Gates 10800 Cells 357MHz 0.15um Technology 1.8V 456-Pin FBGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC2S400E-6FG456I

Package
456FBGA
Family Name
Spartan®-IIE
Device Logic Cells
10800
Device Logic Units
2400
Device System Gates
400000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
329
Ram Bits
163840

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Part Number:
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Spartan-IIE FPGA Family: Pinout Tables
Revision History
108
Version
No.
1.0
1.1
2.0
2.1
2.3
11/15/01
12/20/01
11/18/02
02/14/03
06/18/08
Date
Initial Xilinx release.
Corrected differential pin pair designations.
Added XC2S400E and XC2S600E and FG676. Removed L37 designation from FT256 pinouts.
Minor corrections and clarifications to pinout definitions. Removed Preliminary designation.
Added differential pairs table on
Clarified that XC2S50E has two VREF pins per bank.
Added
numbering. Updated links. Synchronized all modules to v2.3.
Package Overview
section. Updated all modules for continuous page, figure, and table
www.xilinx.com
page
57, fixed 3 P/N designation typos introduced in v2.0.
Description
DS077-4 (2.3) June 18, 2008
Product Specification
R

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