XC3S1200E-4FT256C Xilinx Inc, XC3S1200E-4FT256C Datasheet - Page 42

• Manufacturer Part Number: XC3S1200E-4FT256C
• Description: FPGA Spartan®-3E Family 1.2M Gates 19512 Cells 572MHz 90nm (CMOS) Technology 1.2V 256-Pin FTBGA
• Manufacturer: Xilinx Inc

Specifications of XC3S1200E-4FT256C

• Package: 256FTBGA
• Family Name: Spartan®-3E
• Device Logic Cells: 19512
• Device Logic Units: 2168
• Device System Gates: 1200000
• Number Of Registers: 17344
• Maximum Internal Frequency: 572 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 190
• Ram Bits: 516096

Functional Description
Setting the WRITE_MODE attribute to a value of
WRITE_FIRST, data is written to the addressed memory
location on an enabled active CLK edge and is also passed
to the DO outputs. WRITE_FIRST timing is shown in the
portion of
42
Figure 33
Figure 33: Waveforms of Block RAM Data Operations with WRITE_FIRST Selected
Figure 34: Waveforms of Block RAM Data Operations with READ_FIRST Selected
during which WE is High.
Data_in
Data_in
ADDR
ADDR
CLK
CLK
WE
WE
DO
DO
EN
EN
DI
DI
DISABLED
DISABLED
0000
0000
DI
DI
Internal
Memory
Internal
Memory
XXXX
XXXX
aa
aa
READ
READ
MEM(aa)
MEM(aa)
DO
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DO
bb
MEM(bb)=1111
1111
bb
MEM(bb)=1111
1111
WRITE
WRITE
old MEM(bb)
Setting the WRITE_MODE attribute to a value of
READ_FIRST, data already stored in the addressed loca-
tion passes to the DO outputs before that location is over-
written with new data from the DI inputs on an enabled
active CLK edge. READ_FIRST timing is shown in the por-
tion of
Data_out = Data_in
1111
Prior stored data
Figure 34
2222
cc
2222
cc
MEM(cc)=2222
MEM(cc)=2222
WRITE
WRITE
old MEM(cc)
2222
during which WE is High.
dd
dd
DS312-2_05_020905
DS312-2_06_020905
XXXX
XXXX
READ
READ
MEM(dd)
MEM(dd)
DS312-2 (v3.8) August 26, 2009
Product Specification
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