XC3S50-4TQ144I Xilinx Inc, XC3S50-4TQ144I Datasheet - Page 18
XC3S50-4TQ144I
Manufacturer Part Number
XC3S50-4TQ144I
Description
FPGA Spartan®-3 Family 50K Gates 1728 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP
Manufacturer
Xilinx Inc
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S50-4TQ144I
Package
144TQFP
Family Name
Spartan®-3
Device Logic Units
1728
Device System Gates
50000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
97
Ram Bits
73728
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Spartan-3 FPGA Family: Functional Description
Table 9: DCI I/O Standards (Continued)
18
54
Notes:
1.
2.
3.
Stub Series
Terminated Logic
Differential
Low-Voltage
Differential
Signaling
Category of Signal
DCI signal standards are not supported in Bank 5 of any Spartan-3 FPGA packaged in a VQ100, CP132, or TQ144 package.
The SSTL18_II signal standard does not have a DCI equivalent.
Equivalent to LVTTL DCI.
Standard
SSTL18_I_DCI
SSTL2_I_DCI
SSTL2_II_DCI
DIFF_SSTL2_II_DCI
LVDS_25_DCI
LVDSEXT_25_DCI
Signal Standard
(IOSTANDARD)
Outputs
For
N/A
N/A
1.8
2.5
2.5
www.xilinx.com
V
CCO
(V)
Inputs
For
1.8
2.5
2.5
2.5
2.5
Inputs (V)
V
REF
1.25
1.25
0.9
-
-
for
Split with 25-Ohm
DS099-2 (v2.5) December 4, 2009
25-Ohm driver
25-Ohm driver
At Output
Termination Type
driver
None
Product Specification
each line
At Input
Split on
of pair
Split
R
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