XC3S50-4TQG144C Xilinx Inc, XC3S50-4TQG144C Datasheet - Page 145
![FPGA Spartan®-3 Family 50K Gates 1728 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP](/photos/6/70/67094/144tqfp_sml.jpg)
XC3S50-4TQG144C
Manufacturer Part Number
XC3S50-4TQG144C
Description
FPGA Spartan®-3 Family 50K Gates 1728 Cells 630MHz 90nm Technology 1.2V 144-Pin TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S50-4TQG144C
Package
144TQFP
Family Name
Spartan®-3
Device Logic Units
1728
Device System Gates
50000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
97
Ram Bits
73728
Number Of Logic Elements/cells
1728
Number Of Labs/clbs
192
Total Ram Bits
73728
Number Of I /o
97
Number Of Gates
50000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-LQFP
Case
TQFP144
Dc
06+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S50-4TQG144C
Manufacturer:
XILINX43
Quantity:
240
Part Number:
XC3S50-4TQG144C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Table 95: FT256 Package Pinout (Continued)
Table 96: User I/Os Per Bank in FT256 Package
DS099-4 (v2.5) December 4, 2009
Product Specification
Package Edge
Bank
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Bottom
Right
Left
Top
GND
GND
GND
GND
GND
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
R
XC3S1000
Pin Name
XC3S200
XC3S400
I/O Bank
0
1
2
3
4
5
6
7
Maximum
I/O
Number
20
20
23
23
21
20
23
23
FT256
R15
T16
A11
F16
T11
D13
E12
L16
Pin
M5
R2
R8
A6
D4
E5
T1
F1
L1
T6
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
Type
GND
GND
GND
GND
GND
I/O
13
13
18
18
18
18
www.xilinx.com
8
7
Table 95: FT256 Package Pinout (Continued)
User I/Os by Bank
Table 96
tributed between the eight I/O banks on the FT256 package.
VCCAUX CCLK
VCCAUX DONE
VCCAUX HSWAP_EN
VCCAUX M0
VCCAUX M1
VCCAUX M2
VCCAUX PROG_B
VCCAUX TCK
VCCAUX TDI
VCCAUX TDO
VCCAUX TMS
DUAL
Bank
N/A
N/A
N/A
0
0
0
0
6
6
0
0
All Possible I/O Pins by Type
indicates how the available user-I/O pins are dis-
Spartan-3 FPGA Family: Pinout Descriptions
VCCINT
VCCINT
VCCINT
DCI
2
2
2
2
2
2
2
2
XC3S1000
Pin Name
XC3S200
XC3S400
VREF
3
3
3
3
3
3
3
3
Number
FT256
M12
N13
R14
C14
A15
C13
T15
Pin
N4
C4
P3
P4
B3
A2
T2
GCLK
CONFIG
CONFIG
CONFIG
CONFIG
CONFIG
CONFIG
CONFIG
VCCINT
VCCINT
VCCINT
2
2
0
0
2
2
0
0
JTAG
JTAG
JTAG
JTAG
Type
145