XC3S50-4VQ100C Xilinx Inc, XC3S50-4VQ100C Datasheet - Page 70
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XC3S50-4VQ100C
Manufacturer Part Number
XC3S50-4VQ100C
Description
FPGA Spartan®-3 Family 50K Gates 1728 Cells 630MHz 90nm Technology 1.2V 100-Pin VTQFP
Manufacturer
Xilinx Inc
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S50-4VQ100C
Package
100VTQFP
Family Name
Spartan®-3
Device Logic Units
1728
Device System Gates
50000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
63
Ram Bits
73728
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Spartan-3 FPGA Family: DC and Switching Characteristics
Table 42: Propagation Times for the IOB Input Path
70
Notes:
1.
2.
Propagation Times
Symbol
T
The numbers in this table are tested using the methodology presented in
in
This propagation time requires adjustment whenever a signal standard other than LVCMOS25 is assigned to the data Input. When
this is true, add the appropriate Input adjustment from
T
IOPLID
IOPLI
Table 31
and
The time it takes for data to
travel from the Input pin
through the IFF latch to the I
output with no input delay
programmed
The time it takes for data to
travel from the Input pin
through the IFF latch to the I
output with the input delay
programmed
Table
34.
Description
LVCMOS25
IOBDELAY = NONE
LVCMOS25
IOBDELAY = IFD
Table
www.xilinx.com
Conditions
43.
(2)
(2)
,
,
Table 47
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
and are based on the operating conditions set forth
Device
DS099-3 (v2.5) December 4, 2009
Max
2.01
1.50
1.50
2.01
2.01
2.01
2.09
2.18
4.75
4.89
4.76
5.38
5.76
7.04
7.52
7.69
Speed Grade
-5
Product Specification
Max
2.31
1.72
1.72
2.31
2.31
2.31
2.41
2.51
5.46
5.62
5.48
6.18
6.62
8.09
8.65
8.84
-4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
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