XC5VLX220-1FF1760I Xilinx Inc, XC5VLX220-1FF1760I Datasheet - Page 26

• Manufacturer Part Number: XC5VLX220-1FF1760I
• Description: FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX220-1FF1760I

• Package: 1760FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 221184
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 800
• Ram Bits: 7077888
• Number Of Logic Elements/cells: 221184
• Number Of Labs/clbs: 17280
• Total Ram Bits: 7077888
• Number Of I /o: 800
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1760-BBGA, FCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
• Number Of Gates: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

System Monitor Analog-to-Digital Converter Specification
Table 51: Analog-to-Digital Specifications
DS202 (v5.3) May 5, 2010
Product Specification
AV
DC Accuracy: All external input channels such as V
and Common Mode = 0V
Resolution
Integral Nonlinearity
Differential Nonlinearity
Unipolar Offset Error
Bipolar Offset Error
Gain Error
Bipolar Gain Error
Total Unadjusted Error
(Uncalibrated)
Total Unadjusted Error
(Calibrated)
Calibrated Gain Temperature
Coefficient
DC Common-Mode Reject
Conversion Rate
Conversion Time - Continuous
Conversion Time - Event
T/H Acquisition Time
DRP Clock Frequency
ADC Clock Frequency
CLK Duty cycle
Analog Inputs
Dedicated Analog Inputs
Input Voltage Range
V
Auxiliary Analog Inputs
Input Voltage Range
V
/V
Input Leakage Current
Input Capacitance
On-chip Supply Monitor Error
On-chip Temperature Monitor
Error
AUXP[0]
P
AUXN[15]
DD
- V
= 2.5V ± 2%, V
N
/V
Parameter
(1)
AUXN[0]
(3)
(2)
(1)
to V
(1)
(1)
REFP
AUXP[15]
= 2.5V, V
INL
DNL
TUE
TUE
CMRR
t
t
t
DCLK
ADCCLK
CONV
CONV
ACQ
Symbol
REFN
DC
= 0V, ADCCLK = 5.2 MHz, T
No missing codes (T
Guaranteed Monotonic
Uncalibrated
Uncalibrated measured in bipolar mode
Uncalibrated
Uncalibrated measured in bipolar mode
Deviation from ideal transfer function.
V
Deviation from ideal transfer function.
V
Variation of FS code with temperature
V
V
Number of CLK cycles
Number of CLK cycles
Number of CLK cycles
DRP clock frequency
Derived from DCLK
Unipolar Operation
Differential Inputs
Unipolar Common Mode Range (FS input)
Differential Common Mode Range (FS input)
Bandwidth
Unipolar Operation
Differential Operation
Unipolar Common Mode Range (FS input)
Differential Common Mode Range (FS input)
Bandwidth
A/D not converting, ADCCLK stopped
V
–40°C to +125°C with calibration enabled
REFP
REFP
N
P
CCINT
– V
= V
P
/V
N
– V
– V
CM
and V
N
=
Comments/Conditions
REFN
REFN
=
and V
100mV
0.5V ± 0.5V,
www.xilinx.com
CCAUX
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
=
=
AUXP
2.5V
2.5V
with calibration enabled
MIN
[15:0]/V
A
to T
= T
MIN
MAX
AUXN
to T
)
[15:0], Unipolar Mode,
MAX
, Typical values at T
–0.25
–0.25
+0.3
+0.3
Min
10
26
40
4
8
1
0
0
0
0
±0.01
±0.2
±0.2
±1.0
Typ
±10
±2
±2
±1
70
20
10
10
A
=+25°C
+0.25
+0.25
Max
±0.9
+0.5
+0.7
+0.5
+0.7
±1.0
±30
±30
250
5.2
±2
±2
±2
±2
32
21
60
±4
1
1
% Reading
LSB/°C
Units
LSBs
LSBs
LSBs
LSBs
LSBs
LSBs
Volts
Volts
MHz
MHz
MHz
kHz
Bits
dB
µA
pF
°C
%
%
%
26