LFE2-50E-5FN484I LATTICE SEMICONDUCTOR, LFE2-50E-5FN484I Datasheet - Page 99
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LFE2-50E-5FN484I
Manufacturer Part Number
LFE2-50E-5FN484I
Description
FPGA LatticeECP2 Family 48000 Cells 90nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2-50E-5FN484I
Package
484FBGA
Family Name
LatticeECP2
Device Logic Units
48000
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
339
Ram Bits
396288
In System Programmability
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-50E-5FN484I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LatticeECP2/M sysCONFIG Port Timing Specifications (Continued)
Lattice Semiconductor
Figure 3-14. sysCONFIG Parallel Port Read Cycle
t
t
1. Re-toggling the PROGRAMN pin is not permitted until the INITN pin is high. Avoid consecutive toggling of the PROGRAMN.
2. For SED (Soft Error Detect), the SEDCLKIN operating frequency must be at least 20MHz. SEDCLKIN is derived from Master Clock Fre-
Master Clock Frequency
Duty Cycle
SUSPI
HSPI
quency that has a +/-30% variation..
Parameter
Parameter
WRITEN
SOSPI Data Setup Time Before CCLK
SOSPI Data Hold Time After CCLK
CCLK
CS1N
BUSY
D[0:7]
*n = last byte of read cycle.
CSN
Selected value - 30%
Over Recommended Operating Conditions
Min.
40
t
t
Description
SUCS
SUWD
Byte 0
t
BSCL
3-47
Byte 1
t
CORD
Selected value + 30%
Max.
t
60
DCB
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
t
Byte 2
BSCYC
t
BSCH
Byte n*
Min.
t
t
7
2
HCS
HWD
Units
MHz
Max.
%
—
—
Units
ns
ns
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