NCP1236BD65R2G ON Semiconductor, NCP1236BD65R2G Datasheet - Page 28

• Manufacturer Part Number: NCP1236BD65R2G
• Description: IC CTLR CURR MODE 65KHZ 7-SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1236BD65R2G

• Frequency - Max: 70kHz
• Pwm Type: Current Mode
• Number Of Outputs: 1
• Duty Cycle: 85%
• Voltage - Supply: 9.5 V ~ 28 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width) 7 leads
• Duty Cycle (max): 85 %
• Output Current: 500 mA
• Mounting Style: SMD/SMT
• Switching Frequency: 65 KHz
• Operating Supply Voltage: - 0.3 V to + 28 V
• Supply Current: +/- 30 mA
• Maximum Operating Temperature: + 125 C
• Fall Time: 40 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 40 ns
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Latch−off Input
includes two levels of detection that define a working
window, between a high latch and a low latch: within these
two thresholds, the controller is allowed to run; but as soon
as either the low or the high threshold is crossed, the
controller is latched off. The lower threshold is intended to
be used with an NTC thermistor, thanks to an internal current
source I
high threshold if it is only pulled up by the I
reach the high threshold, the pull−up current has to be higher
than the pull−down capability of the clamp (typically
1.5 mA at V
The Latch pin is dedicated to the latch−off function: it
An active clamp prevents the voltage from reaching the
V
V
V
skip(out)
FB(fold)
skip(in)
Latch
NTC
V
DRV
FB
.
OVP
).
V
1 kW
I
Enters
clamp
NTC
skip
VDD
Soft−start
I
NTC
end
Figure 49. Skip Cycle Timing Diagram
Figure 50. Latch Detection Schematic
NTC
+
current. To
V
http://onsemi.com
Exits
skip
+
OTP
−
+
28
V
OVP
+
−
Enters
(for the high latch) or 350 ms (for the low latch) are blanked
and only longer signals can actually latch the controller.
the V
application can only happen if the power supply is
unplugged from the AC line.
before being at their nominal values; so one of the
comparators could toggle even if it should not. Therefore the
internal logic does not take the latch signal into account
before the controller is ready to start: once V
V
skip
CC(on)
To avoid any false triggering, spikes shorter than 50 ms
Reset occurs when a brown−out condition is detected or
Upon start−up, the internal references take some time
Brown−out
CC
blanking
t
, the latch pin High latch state is taken into account
blanking
Latch(OVP)
t
is cycled down to a reset voltage, which in a real
Latch(OTP)
Reset
S
R
Q
Exits
skip
Latch
CC
reaches
Time
Time