MAX7057ASE+ Maxim Integrated Products, MAX7057ASE+ Datasheet - Page 13

no-image

MAX7057ASE+

Manufacturer Part Number
MAX7057ASE+
Description
RF Transmitter IC TRANSMITTER ASK/FSK
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX7057ASE+

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Using a byte descriptive notation, the reset command
can be viewed as the following sequence, within the
same CS cycle:
SDI:
Values and parameters are set through registers in the
MAX7057 that are addressable through the SPI. These
registers contain bits that either turn functions on and
off or program numerical settings. The following set-
tings are controlled through the SPI.
Figure 6. Reset Command Format
Table 2. Register Summary
SCLK
SDI
ADDRESS
CS
0x0C
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
300MHz to 450MHz Frequency-Programmable
<0x04>
REGISTER NAME
______________________________________________________________________________________
CONFIG0
LOFREQ1
LOFREQ0
CONFIG1
HIFREQ1
HIFREQ0
CONTRL
STATUS
DATAIN
FLOAD
EN
RESET COMMAND (0x04)
Features and Settings
Control register. Controls the mode (ASK/FSK), crystal clock output, envelope-shaping, PLL
bandwidth, and SPI enable.
Configuration 0 register. Controls the capacitance at the PA output and clock output
frequency divider.
High-frequency 1 register (upper byte). Sets the high frequency in FSK transmission.
High-frequency 0 register (lower byte). Sets the high frequency in FSK transmission.
Low-frequency 1 register (upper byte). Sets the low frequency in FSK transmission, or
carrier frequency in ASK transmission.
Low-frequency 0 register (lower byte). Sets the low frequency in FSK transmission, or carrier
frequency in ASK transmission.
Frequency load register. Performs the frequency load function.
Data in register. SPI equivalent of DIN pin.
Enable register. SPI equivalent of ENABLE pin.
Configuration 1 register. GPO selector.
Status register.
The internal variable shunt capacitor, which is instru-
mental in matching the PA to the antenna, is controlled
by setting 5 bits in the configuration 0 register. This
allows for 32 levels of shunt capacitance control. Since
the control of these 5 bits is independent of the other
settings, any capacitance value can be chosen at any
frequency, making it possible to maintain maximum
transmitter efficiency while moving rapidly from one fre-
quency to another.
The MAX7057 has a buffered clock output that can
serve as a clock for a microprocessor. The divide ratio
is set through the configuration 0 register (see Tables 5
and 6). The divide settings are 1 (no division), 2, 4, 8, or
16; the original undivided frequency is based on the
reference frequency generated by the external crystal.
The buffered clock output is available at GPO when
enabled by setting the configuration 1 register (see
Tables 2, 3, 15, and 16).
The transmission mode is selected by writing to a regis-
ter. The default mode is ASK and the mode can be
changed to FSK by writing a 1 to the mode bit in the
control register. This register is also used to keep the
crystal circuit powered up in the shutdown mode.
The following tables provide information on the
MAX7057 registers.
ASK/FSK Transmitter
DESCRIPTION
Mode Select and Crystal Shutdown
Variable Capacitor
Clock Output
Registers
13

Related parts for MAX7057ASE+