ATA5428-PLSW80 Atmel, ATA5428-PLSW80 Datasheet - Page 58

• Manufacturer Part Number: ATA5428-PLSW80
• Description: RF Transceiver ASK/FSK Transceiver 434 and 868MHz
• Manufacturer: Atmel

Specifications of ATA5428-PLSW80

• Wireless Frequency: 226 KHz, 237 KHz
• Interface Type: 4-Wire SPI
• Noise Figure: 7 dB
• Output Power: 10 dBm
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-48
• Maximum Data Rate: 20 Kbps
• Minimum Operating Temperature: - 40 C
• Modulation: ASK, FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 9-6.
Figure 9-7.
9.1.6
58
Bit-check counter
Bit-check counter
ATA5423/ATA5425/ATA5428/ATA5429
Duration of the Bit Check
(Lim_min = 14, Lim_max = 24)
(Lim_min = 14, Lim_max = 24)
RX_ACTIVE
RX_ACTIVE
Demod_Out
Demod_Out
Timing Diagram for Failed Bit Check (Condition CV_Lim < Lim_min)
Timing Diagram for Failed Bit Check (Condition: CV_Lim
Bit check
Bit check
T
Start-up mode
T
Start-up mode
Startup_Sig_Proc
Startup_Sig_Proc
If no transmitter is present during the bit check, the output of the ASK/FSK demodulator delivers
random signals. The bit check is a statistical process and T
fore, an average value for T
the selected bit-rate range and on T
T
Bit-check
0
0
, resulting in a lower current consumption in RX polling mode.
Bit check failed (CV_Lim < Lim_min)
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 101112
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 101112
Bit check mode
T
Bit_check
1/2 Bit
1/2 Bit
Bit check mode
Bit check failed (CV_Lim < Lim_min)
Bit-check
T
Bit_check
is given in the electrical characteristics. T
XDCLK
131415161718192021222324
. A higher bit-rate range causes a lower value for
Lim_max)
Sleep mode
Bit-check
T
Sleep
0
varies for each check. There-
Sleep mode
T
Sleep
0
Bit-check
4841D–WIRE–10/07
depends on