MAX2370ETM+T Maxim Integrated Products, MAX2370ETM+T Datasheet - Page 9

• Manufacturer Part Number: MAX2370ETM+T
• Description: RF Transmitter IC TRANSMITTER QUAD-EP
• Manufacturer: Maxim Integrated Products

Specifications of MAX2370ETM+T

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

current consumption and linearity performance. The
power-control range of the RF VGA is typically 44dB.
The MAX2370 includes a PA driver that is optimized for
the 410MHz to 500MHz RF frequency range. The PA
driver is an open-collector output and requires a pullup
inductor to V
element in a shunt-series matching network.
The MAX2370 includes eight programmable registers
consisting of four divide registers, a configuration regis-
ter, an operational control register, a current control
register, and a test register. Each register consists of
24 bits. The 4 least significant bits (LSBs) are the regis-
ter’s address. The 20 most significant bits (MSBs) are
used for register data. All registers contain some “don’t
care” bits. These can be either a 0 or 1 and do not
affect operation (Figure 1). Data is shifted in MSB first,
followed by the 4-bit address. When CS is low, the
clock is active and data is shifted with the rising edge
of the clock. When CS transitions to high, the shift reg-
ister is latched into the register selected by the con-
tents of the address bits. Typical register settings for
the eight registers are shown in Table 1. The dividers
and control registers are programmed from the
SPI/QSPI/MICROWIRE-compatible serial port.
The RFM register sets the main frequency divide ratio
for the RF PLL. The RFR register sets the reference fre-
quency divide ratio. The RF VCO frequency can be
determined by the following:
The IFM and IFR registers are similar:
where f
The operational control register (OPCTRL) controls the
state of the MAX2370. See Table 2 for a description of
each bit’s function.
The configuration register (CONFIG) sets the configura-
tion for the RF and IF PLL and the baseband I/Q input
levels. See Table 3 for a description of each bit’s function.
The current-control register (I
current to accommodate different operating modes. In
the high-power mode, MPL = 1 sets the bias current and
conversion gain to deliver an output power of at least
+5.5dBm from the PA drivers. In the low-noise mode,
MPL = 0 reduces output noise by 2.5dB for any given
REF
RF VCO frequency = f
IF VCO frequency = f
is the external reference frequency.
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Complete 450MHz Quadrature Transmitter
. The pullup inductor can act as a shunt
_______________________________________________________________________________________
Programmable Registers
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REF
REF
CTRL) modifies the bias
x (RFM / RFR)
x (IFM / IFR)
PA Driver
output power at the expense of 3.4dB less maximum
obtainable output power.
Bias control is distributed among several functional
sections and can be controlled to accommodate many
different power-down modes as shown in Table 8.
The serial interface remains active during shutdown.
Setting bit SHDN_BIT = 0 or pin SHDN = GND powers
down the device. In either case, PLL programming and
register information is retained.
Figure 3 shows the 3-wire interface timing diagram. The
3-wire bus is SPI/QSPI/MICROWIRE compatible.
To produce a low-spur and EMC-compliant transmitter,
minimize circular current-loop area to reduce H-field
radiation. To minimize circular current-loop area, bypass
all V
the distributed capacitance of a ground plane. To mini-
mize voltage drops, make V
Program only the necessary bits in any register to mini-
mize cycling of the serial interface’s clock. RC filtering
can also be used to slow the clock edges on the 3-wire
interface, reducing high-frequency spectral content.
RC filtering also provides transient protection by shunt-
ing high frequencies to ground, while the series resis-
tance attenuates the transients for error-free operation.
The same applies to the logic input pins (SHDN,
TXGATE, IDLE).
Place high-frequency bypass capacitors close to the
pins with a dedicated via for each capacitor to ground.
The 48-pin thin QFN-EP package provides minimal
ground inductance by using an exposed paddle under
the part. Provide at least five low-inductance vias under
the exposed paddle to ground. Use a solid ground
plane wherever possible. Any cutout in the ground
plane may act as a slot radiator and reduce its shield
effectiveness.
Keep RF LO traces as short as possible to reduce LO
radiation and susceptibility to interference.
The IF tank is fully differential. The external tank compo-
nents for 120MHz IF operation are shown in the Typical
Application Circuit. See Maxim Application Note IF Tank
Design for the MAX2360 at www.maxim-ic.com for more
information on designing tanks for alternate IFs.
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pins as close to the device as possible and use
Applications Information
Electromagnetic Compliance
3-Wire Serial Interface
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traces short and wide.
Power Management
Considerations
IF Tank Design
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