ATA556714-DDW Atmel, ATA556714-DDW Datasheet - Page 7

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ATA556714-DDW

Manufacturer Part Number
ATA556714-DDW
Description
RF Wireless Misc 125 KHz (330bit r/w 75pF)
Manufacturer
Atmel
Datasheet

Specifications of ATA556714-DDW

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.2
4.3
4.4
4874F–RFID–07/08
Tag to Reader Communication
Regular-read Mode
Block-read Mode
During normal operation, the data stored within the EEPROM is cycled and the Coil 1 and Coil 2
terminals are load modulated. This resistive load modulation can be detected at the reader
module.
In regular-read mode, data from the memory is transmitted serially, starting with block 1, bit 1,
up to the last block (for example, 7), bit 32. The last block which will be read is defined by the
mode parameter field MAXBLK in EEPROM block 0. When the data block addressed by MAX-
BLK has been read, data transmission restarts with block 1, bit 1.
The user may limit the cyclic data stream in regular-read mode by setting the MAXBLK between
0 and 7 (representing each of the 8 data blocks). If set to 7, blocks 1 through 7 can be read. If
set to 1, only block 1 is transmitted continuously. If set to 0, the contents of the configuration
block (normally not transmitted) can be read. In the case of MAXBLK = 0 or 1, regular-read
mode can not be distinguished from block-read mode.
Figure 4-1.
Every time the ATA5567 enters regular-read or block-read mode, the first bit transmitted is a
logical 0. The data stream starts with block 1, bit 1, continues through MAXBLK, bit 32, and
cycles continuously if in regular-read mode.
Note:
With the direct access command, only the addressed block is repetitively read. This mode is
called block-read mode. Direct access is entered by transmitting the page access opcode (“10”
or “11”), a single “0” bit and the requested 3-bit block address when the tag is in normal mode.
In password mode (PWD bit set), the direct access to a single block needs the valid 32-bit pass-
word to be transmitted after the page access opcode, whereas a “0” bit and the 3-bit block
address follow afterwards. In case the transmitted password does not match with the contents of
block 7, the ATA5567 tag returns to the regular-read mode.
Note:
MAXBLK = 5
MAXBLK = 2
MAXBLK = 0
This behavior is different from the original e555x and helps to decode PSK-modulated data.
A direct access to block 0 of page 1 will read the configuration data of block 0, page 0.
A direct access to blocks 3 to 7 of page 1 reads all data bits as zero.
Examples for Different MAXBLK Settings
Loading block 0
Loading block 0
Loading block 0
0
0
0
Block 1
Block 1
Block 0
Block 4
Block 2
Block 0
Block 5
Block 1
Block 0
Block 1
Block 2
Block 0
Block 2
Block 1
Block 0
ATA5567
7

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