ATA3741P3-TGSY Atmel, ATA3741P3-TGSY Datasheet - Page 10

• Manufacturer Part Number: ATA3741P3-TGSY
• Description: RF Receiver ASK/FSK Rem. Ctrl. Rec. (IF= 600 kHz)
• Manufacturer: Atmel
• Type: Receiverr

Specifications of ATA3741P3-TGSY

• Package / Case: SOIC-20
• Operating Frequency: 450 MHz
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Frequency (max): 450000kHz
• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10
ATA3741
Figure 5-1.
Pin MODE can now be set in accordance with the desired clock cycle T
lowing application-relevant parameters:
Most applications are dominated by two transmission frequencies: f
used in the USA, f
parameters, the electrical characteristics display three conditions for each parameter.
The clock cycle of some function blocks depends on the selected baud rate range (BR_Range)
which is defined in the OPMODE register. This clock cycle T
mulas for further reference:
BR_Range =
• Timing of the polling circuit including bit check
• Timing of analog and digital signal processing
• Timing of register programming
• Frequency of the reset marker
• IF filter center frequency (f
• USA Applications
• Europe Applications
• Other applications
(f
(f
(T
is given as a function of T
XTO
XTO
Clk
is dependent on f
= 4.90625 MHz, MODE = 0, T
= 6.76438 MHz, MODE = 1, T
Generation of the Basic Clock Cycle
BR_Range0:
BR_Range1:
BR_Range2:
BR_Range3:
Send
= 433.92 MHz in Europe. In order to ease the usage of all T
XTO
Clk
and on the logical state of pin MODE. The electrical characteristic
IF0
).
)
Divider
:14/:10
XTO
T
T
T
T
XClk
XClk
XClk
XClk
T
f
XTO
Clk
Clk
Clk
= 8
= 4
= 2
= 1
= 2.0383 µs)
= 2.0697 µs)
T
T
T
T
14
16
Clk
Clk
Clk
Clk
15
DVCC
XTO
MODE
L : USA (:10)
H: Europe (:14)
XClk
is defined by the following for-
Send
Clk
. T
= 315 MHz is mainly
Clk
controls the fol-
Clk
4899B–RKE–10/06
-dependent