74HCT7046AD-T NXP Semiconductors, 74HCT7046AD-T Datasheet - Page 29

Phase Locked Loops (PLL) PHASED-LOCKED LOOP W/LOCK DTCT

74HCT7046AD-T

Manufacturer Part Number
74HCT7046AD-T
Description
Phase Locked Loops (PLL) PHASED-LOCKED LOOP W/LOCK DTCT
Manufacturer
NXP Semiconductors
Type
PLLr
Datasheet

Specifications of 74HCT7046AD-T

Number Of Circuits
1
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
Package / Case
SO-16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HCT7046AD,118
Philips Semiconductors
December 1990
SUBJECT
PLL conditions
PLL frequency
PLL locks on
noise rejection at
AC ripple content
with no signal at
the SIG
capture range
harmonics at
centre frequency
signal input
when PLL is
locked
Phase-locked-loop with lock detector
IN
input
PHASE
COMPARATOR
PC1
PC2
PC1, PC2
PC1
PC2
PC1
PC2
PC1
PC2
DESIGN CONSIDERATIONS
VCO adjusts to f
VCO adjusts to f
Loop filter component selection
(a) = R3 x C2
(a) 1 = R3 x C2;
yes
no
high
low
f
f
r
r
= 2f
= f
2 = R4 x C2;
3 = (R3 + R4) x C2
i
, small ripple content at
i
, large ripple content at
Fig. 26 Simple loop filter for PLL with offset; R3 R4 500 .
Fig. 25 Simple loop filter for PLL without offset; R3 500 .
o
o
29
with
with
(b) amplitude characteristic
(b) amplitude characteristic
DEMOUT
DEMOUT
DEMOUT
DEMOUT
= 90 and V
= 360 and V
= 0
= 90
VCOIN
VCOIN
74HC/HCT7046A
= 1/2 V
(c) pole-zero diagram
(c) pole-zero diagram
= min. (see Fig.8).
Product specification
CC
(see Fig.6).

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