STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 2
STLC5466
Manufacturer Part Number
STLC5466
Description
RF Wireless Misc Multi-HDLC Sw Matrix
Manufacturer
STMicroelectronics
Type
Telecom ICr
Specifications of STLC5466
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-176
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
STLC5466
TABLE OF CONTENTS
I
I.1
I.2
I.3
I.3.1
I.3.2
I.3.3
II
III
III.1
III.1.1
III.1.2
III.1.3
III.1.4
III.1.5
III.1.5.1
III.1.5.2
III.1.6
III.1.6.1
III.1.6.2
III.1.6.3
III.1.7
III.1.8
III.2
III.2.1
III.2.1.1
III.2.1.2
III.2.1.3
III.2.2
III.2.3
III.2.4
III.2.4.1
III.2.4.2
III.2.4.3
III.2.5
III.2.6
III.2.6.1
III.2.6.2
III.3
III.3.1
III.3.2
2/130
PIN INFORMATION................................................................................................................6
PIN CONNECTIONS ..............................................................................................................6
PIN DESCRIPTION ................................................................. ..............................................7
PIN DEFINITION...................................................................... ............................................12
Input Pin Definition................................................................................................................12
Output Pin Definition ............................................................................................................12
Input/Output Pin Definition. ..................................................................................................12
BLOCK DIAGRAM ...............................................................................................................13
FUNCTIONAL DESCRIPTION .............................................................................................13
THE SWITCHING MATRIX N X 64 KBITS/S........................................................................13
Function Description .............................................................................................................13
Architecture of the Matrix .....................................................................................................13
Connection Function ............................................................................................................13
Loop Back Function .............................................................................................................15
Delay through the Matrix ......................................................................................................15
Connection Memory .............................................................................................................15
Switching at 32 Kbit/s ...........................................................................................................15
Switching at 16 Kbit/s ...........................................................................................................16
HDLC CONTROLLER.............................................................. ............................................16
Function description .............................................................................................................16
CSMA/CR Capability ............................................................................................................17
Time Slot Assigner Memory .................................................................................................17
Data Storage Structure .........................................................................................................18
Transparent Modes ..............................................................................................................18
Command of the HDLC Channels ........................................................................................19
C/I AND MONITOR.................................................................. ............................................19
Function Description ............................................................................................................19
GCI and V* Protocol .............................................................................................................19
Variable Delay Mode ........................................................................................................15
Sequence Integrity Mode ..................................................................................................15
Description .......................................................................................................................15
Access to Connection Memory .........................................................................................15
Access to Data Memory....................................................................................................15
Format of the HDLC Frame ..............................................................................................16
Composition of an HDLC Frame .......................................................................................16
Description and Functions of the HDLC Bytes..................................................................16
Reception..........................................................................................................................18
Transmission.....................................................................................................................18
Frame Relay .....................................................................................................................18
Reception Control .............................................................................................................19
Transmission Control ........................................................................................................19