EVAL-ADT7463EB ON Semiconductor, EVAL-ADT7463EB Datasheet - Page 37

• Manufacturer Part Number: EVAL-ADT7463EB
• Manufacturer: ON Semiconductor

Specifications of EVAL-ADT7463EB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Bit
<2:0>
<5:3>
<7:6>
*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to this register fail.
REV. C
Name
CYR1
CYL
CYR2
Table XI. Register 0x37 – Dynamic T
R/W*
Read/Write
Read/Write
Read/Write
Description
subsequent T
number of monitoring cycles. The system has associated thermal time constants that
need to be found to optimize the response of fans and the control loop.
Bits
000
001
010
011
100
101
110
111
3-Bit Local Temp Cycle Value. These three bits define the delay time between making
subsequent T
terms of number of monitoring cycles. The system has associated thermal time con-
stants that need to be found to optimize the response of fans and the control loop.
Bits
000
001
010
011
100
101
110
111
2 LSBs of 3-Bit Remote 2 Cycle Value. The MSB of the 3-bit code resides in Dynamic
T
making subsequent T
terms of number of monitoring cycles. The system has associated thermal time con-
stants that need to be found to optimize the response of fans and the control loop.
Bits
000
001
010
011
100
101
110
111
3-Bit Remote 1 Cycle Value. These three bits define the delay time between making
MIN
Control Register 1 (Reg. 0x36). These three bits define the delay time between
MIN
MIN
Decrease Cycle
4 cycles (0.5 s)
8 cycles (1 s)
16 cycles (2 s)
32 cycles (4 s)
64 cycles (8 s)
128 cycles (16 s)
256 cycles (32 s)
512 cycles (64 s)
Decrease Cycle
4 cycles (0.5 s)
8 cycles (1 s)
16 cycles (2 s)
32 cycles (4 s)
64 cycles (8 s)
128 cycles (16 s)
256 cycles (32 s)
512 cycles (64 s)
Decrease Cycle
4 cycles (0.5 s)
8 cycles (1 s)
16 cycles (2 s)
32 cycles (4 s)
64 cycles (8 s)
128 cycles (16 s)
256 cycles (32 s)
512 cycles (64 s)
MIN
adjustments in the control loop for the local temperature channel, in
adjustments in the control loop for the Remote 1 channel, in terms of
Control Register 2 (Power-On Default = 0x00)
–37–
MIN
adjustments in the control loop for the Remote 2 channel, in
Increase Cycle
8 cycles (1 s)
16 cycles (2 s)
32 cycles (4 s)
64 cycles (8 s)
128 cycles (16 s)
256 cycles (32 s)
512 cycles (64 s)
1024 cycles (128 s)
Increase Cycle
8 cycles (1 s)
16 cycles (2 s)
32 cycles (4 s)
64 cycles (8 s)
128 cycles (16 s)
256 cycles (32 s)
512 cycles (64 s)
1024 cycles (128 s)
Increase Cycle
8 cycles (1 s)
16 cycles (2 s)
32 cycles (4 s)
64 cycles (8 s)
128 cycles (16 s)
256 cycles (32 s)
512 cycles (64 s)
1024 cycles (128 s)
ADT7463