XC95144-10TQ100C Xilinx Inc, XC95144-10TQ100C Datasheet - Page 2

• Manufacturer Part Number: XC95144-10TQ100C
• Description: CPLD XC9500 Family 3.2K Gates 144 Macro Cells 66.7MHz 0.5um (CMOS) Technology 5V 100-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: XC9500r

Specifications of XC95144-10TQ100C

• Package: 100TQFP
• Family Name: XC9500
• Device System Gates: 3200
• Number Of Macro Cells: 144
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 81
• Number Of Logic Blocks/elements: 8
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.7 MHz
• Number Of Product Terms Per Macro: 90
• Memory Type: Flash
• Operating Temperature: 0 to 70 °C
• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 4.75 V ~ 5.25 V
• Number Of Logic Elements/blocks: 8
• Number Of Macrocells: 144
• Number Of Gates: 3200
• Number Of I /o: 81
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Voltage: 5V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DS067 (v5.7) May 28, 2009
Product Specification
JTAG Port
I/O/GCK
I/O/GSR
I/O/GTS
R
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Function block outputs (indicated by the bold line) drive the I/O blocks directly.
2
3
1
1
3
Controller
Figure 2: XC95144 Architecture
Blocks
JTAG
I/O
www.xilinx.com
In-System Programming Controller
XC95144 In-System Programmable CPLD
18
18
18
18
18
36
36
36
36
36
Macrocells
Macrocells
Macrocells
Macrocells
Macrocells
Function
Function
Function
Function
Function
Block 1
Block 2
Block 3
Block 4
Block 8
1 to 18
1 to 18
1 to 18
1 to 18
1 to 18
DS067_02_110101
2