XC6SLX9-2FTG256C Xilinx Inc, XC6SLX9-2FTG256C Datasheet - Page 28
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XC6SLX9-2FTG256C
Manufacturer Part Number
XC6SLX9-2FTG256C
Description
FPGA Spartan®-6 Family 9152 Cells 45nm (CMOS) Technology 1.2V 256-Pin FTBGA
Manufacturer
Xilinx Inc
Series
Spartan® 6 LXr
Specifications of XC6SLX9-2FTG256C
Package
256FTBGA
Family Name
Spartan®-6
Device Logic Cells
9152
Device Logic Units
5720
Number Of Registers
11440
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
186
Ram Bits
589824
Number Of Logic Elements/cells
9152
Number Of Labs/clbs
715
Total Ram Bits
589824
Number Of I /o
186
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-LBGA
No. Of Logic Blocks
1430
No. Of Macrocells
9152
Family Type
Spartan-6
No. Of Speed Grades
2
No. Of I/o's
186
Clock Management
DCM, PLL
Core Supply Voltage Range
1.14V To
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC6SLX9-2FTG256C
Manufacturer:
NEC
Quantity:
1 200
Company:
Part Number:
XC6SLX9-2FTG256C
Manufacturer:
XILINX
Quantity:
177
Table 31: Output Delay Measurement Methodology (Cont’d)
Simultaneously Switching Outputs
Due to lead inductance, a given package supports a limited number of simultaneous switching outputs (SSOs) when using
fast, high-drive outputs.
SSOs. These guidelines describe the maximum number of user I/O pins of an output signal standard that should
simultaneously switch in the same direction, while maintaining a safe level of switching noise for that particular signal
standard. Meeting these guidelines for the stated test conditions ensures that the FPGA operates free from the adverse
effects of GND and power bounce.
For each device/package combination,
output signal standard and drive strength,
direction, allowed per V
output drive current. The number of SSOs are also specified by I/O bank. Multiply the appropriate numbers from each table
to calculate the maximum number of SSOs allowed within an I/O bank. The guidelines assume that all pins within a bank use
the same I/O standard. Exceeding these SSO guidelines can result in increased power or GND bounce, degraded signal
integrity, or increased system jitter. For a given I/O standard, if the SSO limit per pair in
I/O per pair in
The recommended maximum SSO values assume that the FPGA is soldered on a printed circuit board and that the board
uses sound design practices. Due to the additional lead inductance introduced by the socket, the SSO values do not apply
for FPGAs mounted in sockets. The SSO values assume that the V
provides better SSO characteristics. For more detail, see the Spartan-6 FPGA SelectIO Resources User Guide.
DS162 (v2.0) March 31, 2011
Preliminary Product Specification
Notes:
1.
2.
3.
SSTL, Class II, 2.5V
SSTL, Class II, 1.5V
LVDS (Low-Voltage Differential Signaling), 2.5V & 3.3V
BLVDS (Bus LVDS), 2.5V
Mini-LVDS, 2.5V & 3.3V
RSDS (Reduced Swing Differential Signaling), 2.5V & 3.3V RSDS_25, RSDS_33
TMDS (Transition Minimized Differential Signaling), 3.3V
PPDS (Point-to-Point Differential Signaling, 2.5V & 3.3V
C
Per PCI specifications.
The value given is the differential output voltage.
REF
is the capacitance of the probe, nominally 0 pF.
Table
32, then there is no SSO limit for the exclusive use of that I/O standard.
Description
CCO
Table 32
/GND pair within an I/O bank. The guidelines are categorized by package style, slew rate, and
and
Table 33
Table 32
Table 33
provide guidelines for the recommended maximum allowable number of
provides the number of equivalent V
recommends the maximum number of SSOs, switching in the same
www.xilinx.com
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
LVDS_25, LVDS_33
MINI_LVDS_25, MINI_LVDS_33
SSTL2_II
SSTL15_II
BLVDS_25
TMDS_33
PPDS_25, PPDS_33
I/O Standard
Attribute
CCAUX
is powered at 3.3V. Setting V
CCO
Table 33
/GND pairs per bank. For each
R
100
100
100
100
100
100
()
25
25
REF
is greater than the maximum
C
(pF)
REF
0
0
0
0
0
0
0
0
(1)
CCAUX
V
V
V
MEAS
(V)
0
0
0
0
0
0
REF
REF
to 2.5V
(3)
(3)
(3)
(3)
(3)
(3)
V
1.25
0.75
(V)
1.2
1.2
1.2
REF
0
–
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