T1235-800G-TR STMicroelectronics, T1235-800G-TR Datasheet - Page 5

TRIAC 12A 35MA 800V D2PAK

T1235-800G-TR

Manufacturer Part Number
T1235-800G-TR
Description
TRIAC 12A 35MA 800V D2PAK
Manufacturer
STMicroelectronics
Series
Snubberless™r
Datasheet

Specifications of T1235-800G-TR

Triac Type
Alternistor - Snubberless
Mounting Type
Surface Mount
Configuration
Single
Current - Hold (ih) (max)
35mA
Voltage - Off State
800V
Current - Gate Trigger (igt) (max)
35mA
Current - Non Rep. Surge 50, 60hz (itsm)
120A, 126A
Current - On State (it (rms)) (max)
12A
Voltage - Gate Trigger (vgt) (max)
1.3V
Package / Case
TO-263-3, D²Pak (2 leads + Tab), TO-263AB
Current - On State (it (rms) (max)
12A
Peak Repetitive Off-state Voltage, Vdrm
800V
Gate Trigger Current Max (qi), Igt
35mA
On State Rms Current It(rms)
12A
Peak Non Rep Surge Current Itsm 50hz
120A
Holding Current Max Ih
35mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6593-2
T1235-800G-TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
T1235-800G-TR
Manufacturer:
STMicroelectronics
Quantity:
44 722
Part Number:
T1235-800G-TR
Manufacturer:
ST
0
Company:
Part Number:
T1235-800G-TR
Quantity:
3 000
BTA12, BTB12, T12xx
Figure 7.
Figure 9.
Figure 11. Relative variation of critical rate of
6
5
4
3
2
1
0
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
1000
100
0
10
(dI/dt)c [T ] /
0.1
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
0.01
B
I
TSM
C
dI/dt limitation:
T1210/SW
(A), I t (A s)
50A/µs
j
25
2
Non-repetitive surge peak on-state
current for a sinusoidal pulse with
width t
value of I
Relative variation of critical rate of
decrease of main current versus
(dV/dt)c (typical values)
(BW/CW/T1210/T1235)
decrease of main current versus
junction temperature
(dI/dt)c [T s
2
1.0
0.10
p
(dV/dt)c (V/µs)
j
50
< 10 ms and corresponding
pecified]
2
t
t (ms)
T (°C)
p
j
75
10.0
1.00
I
TSM
T1235/T1250/CW/BW
100
I t
2
T initial=25°C
j
10.00
100.0
125
Figure 8.
Figure 10. Relative variation of critical rate of
Figure 12. D
80
70
60
50
40
30
20
10
2.5
2.0
1.5
1.0
0.5
0.0
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
-40
R
I
0.1
GT H L
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
th(j-a)
,I ,I [T ] /
4
-20
D PAK
(°C/W)
2
I
TW
H
& I
L
j
8
I
Figure 8: Relative variation of gate
trigger current, holding current and
latching current versus junction
temperature (typical values)
decrease of main current versus
(dV/dt)c (typical values) (TW)
to ambient versus copper surface
under tab (printed circuit board
FR4, copper thickness: 35 µm)
GT
0
I
2
GT H L
PAK thermal resistance junction
12
,I ,I [T =25°C]
20
1.0
(dV/dt)c (V/µs)
16
j
40
S(cm²)
T (°C)
j
20
60
24
10.0
80
28
Characteristics
100
32
120
36
100.0
5/12
140
40

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