SY89837UMI TR Micrel Inc, SY89837UMI TR Datasheet - Page 6

• Manufacturer Part Number: SY89837UMI TR
• Manufacturer: Micrel Inc
• Type: Clock Driverr

Specifications of SY89837UMI TR

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 2000MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Package Type: MLF
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/PECL
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Not Compliant

Micrel, Inc.
Case #4 Input Clock Failure: Switching from the selected
clock input stuck in an undetermined state to a valid clock
input (RPE enabled).
extremely low signal swing, including 0mV, the FSI function
will eliminate any metastable condition and guarantee a
stable output signal. No ringing and no undetermined state
will occur at the output under these conditions.
function to ensure the RPE logic starts-up in a known logic
state once the power-supply voltage is stable. An external
capacitor connected between V
controls the delay for the power-on reset function.
the time the system power supply needs to power up to a
minimum of 2.3V. The time constant for the internal power-
on-reset must be greater than the time required for the power
supply to ramp up to a minimum of 2.3V.
M9999-060410
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If the selected input clock fails to a floating, static, or
The SY89837U includes an internal power-on reset (POR)
Calculation of the required capacitor value is based on
POWER-ON RESET (POR) DESCRIPTION
CC
and the CAP pin (pin 10)
Figure 5. Timing Diagram 4
6
below the 200mV (V
or 400mV differentially) before the RPE MUX selects CLK2
(using the SEL pin), the switchover to the valid clock CLK2
will occur either following Case #2 or Case #3, depending
upon the last valid state at the CLK1.
duty cycle distortions or runt pulses in case of a slowly
deteriorating (but still toggling) input signal. Due to the FSI
function, the propagation delay will depend upon rise and
fall time of the input signal and on its amplitude. Refer to
“Operation Characteristics” for detailed information.
supply to power up past 2.3V is 12ms, the required capacitor
value on pin 10 would:
If CLK1 fails to an undetermined state (e.g., amplitude falls
Please note that the FSI function will not prevent
The following term describes this relationship:
As an example, if the time required for the system power
C (µF ) >
C (µF ) >
C > 1µ F
12(ms/µF)
12(ms/µF)
tdPS(ms)
12ms
IN
) minimum single-ended input limit,
Precision Edge
SY89837U
®