ICS8308AGI IDT, Integrated Device Technology Inc, ICS8308AGI Datasheet - Page 10

• Manufacturer Part Number: ICS8308AGI
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS8308AGI

• Number Of Clock Inputs: 2
• Output Frequency: 350MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / RoHS Status: Not Compliant

ICS8308I Data Sheet
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
W
R
I
CLK I
For applications not requiring the use of the test clock, it can be
left floating. Though not required, but for additional protection, a
1k
CLK/nCLK I
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required, but
for additional protection, a 1k
ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
ICS8308AGI REVISION C JULY 20, 2009
NPUTS
ECOMMENDATIONS FOR
IRING THE
resistor can be tied from the CLK input to ground.
NPUT
:
ONTROL
NPUTS
D
IFFERENTIAL
resistor can be used.
P
INS
U
NUSED
I
NPUT TO
resistor can be tied from CLK to
F
IGURE
I
NPUT AND
Single Ended Clock Input
A
CCEPT
1. S
A
PPLICATION
INGLE
O
S
INGLE
UTPUT
E
NDED
C1
0.1u
DD
V_REF
/2 is
E
P
S
NDED
INS
IGNAL
10
LOW SKEW, 1-TO-8 DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
I
L
NFORMATION
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
O
LVCMOS O
All unused LVCMOS output can be left floating. There should be
no trace attached.
D
EVELS
1K
RIVING
UTPUTS
R1
1K
R2
VDD
D
CLK
nCLK
:
IFFERENTIAL
UTPUTS
I
NPUT
DD
= 3.3V, V_REF should be 1.25V
2009 Integrated Device Technology, Inc.