SY58018UMITR Micrel Inc, SY58018UMITR Datasheet - Page 5

• Manufacturer Part Number: SY58018UMITR
• Manufacturer: Micrel Inc
• Type: Clock Multiplexerr

Specifications of SY58018UMITR

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Package Type: MLF
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/PECL
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Not Compliant

Micrel, Inc.
V
Symbol
f
t
t
t
t
t
Notes:
8.
9.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
11. RJ is measured with a K28.7 comma detect character pattern, measured at 10.7Gbps and 2.5Gbps/3.2Gbps.
12. DJ is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 2
13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, T
14. Total jitter definition: with an ideal clock input of frequency - f
15. Crosstalk is measured at the output while applying two similar frequencies that are asynchronous with respect to each other at the inputs.
M9999-082707
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MAX
pd
pd
SKEW
JITTER
r
, t
CC
AC ELECTRICAL CHARACTERISTICS
f
Tempco
High frequency AC parameters are guaranteed by design and characterization.
Input-to-input skew is the difference in time from and input-to-output in comparison to any other input-to-output. In addition, the input-to-input skew
does not include the output skew.
respective inputs.
signal.
specified peak-to-peak jitter value.
= 2.5V ±5% or 3.3V ±10%; T
Parameter
Maximum Operating Frequency
Differential Propagation Delay
Differential Propagation Delay
Temperature Coefficient
Data
Clock
Crosstalk-Induced Jitter
Output Rise/Fall Time
Cycle-to-Cycle Jitter
Input-to-Input Skew
Deterministic Jitter
Part-to-Part Skew
A
(IN0 or IN1-to-Q)
= –40°C to 85°C, R
Random Jitter
(SEL-to-Q)
Total Jitter
Condition
V
Note 9
Note 10
Note 11
Note 12
Note 13
Note 14
Note 15
20% to 80%, at full swing
L
= 50ý to V
OUT
(8)
23
MAX
– 1 PRBS pattern.
ž 400mV
no more than one output edge in 10
CC
5
– 2V, unless otherwise stated.
n
– T
n–1
where T is the time between rising edges of the output
NRZ Data
12
Clock
output edges will deviate by more than the
Min
110
50
35
5
Typ
190
180
75
75
4
4
Precision Edge
Max
240
350
100
110
0.7
15
10
10
1
1
SY58018U
ps
ps
ps
Units
Gbps
fs/°C
ps
ps
GHz
ps
ps
ps
ps
ps
RMS
RMS
RMS
PP
PP
®