IMIZ9952AA Cypress Semiconductor Corp, IMIZ9952AA Datasheet - Page 2

• Manufacturer Part Number: IMIZ9952AA
• Manufacturer: Cypress Semiconductor Corp

Specifications of IMIZ9952AA

• Number Of Outputs: 11
• Operating Supply Voltage (max): 3.47V
• Operating Temp Range: -40C to 85C
• Propagation Delay Time: 0.2ns
• Operating Supply Voltage (min): 3.14V
• Mounting: Surface Mount
• Pin Count: 32
• Operating Supply Voltage (typ): 3.3V
• Package Type: TQFP
• Duty Cycle: 50%
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Not Compliant

Pin Description
6
12, 14, 15,
18, 19
22, 23, 26, 27
30, 31
8
1
5
9
2, 3, 4
16, 20, 21,
25, 32
10
11
7, 13, 17, 24,
28, 29
PD = Internal Pull-Down
Cypress Semiconductor Corporation
http://www.cypress.com
PIN
REFCLK
QA(0:4)
QB(0:3)
QC(0,1)
FB_IN
VCO_SEL
MR/OE#
PLL_EN#
SEL(C:A)
VDDC
VDDA
VDD
VSS
NAME
VDDC
VDDC
VDDC
PWR
I, PD
I, PD
I, PD
I/O
O
O
O
I
I
I
External Test Clock Input.
Clock Output. See Frequency Table.
Clock Output. See Frequency Table.
Clock Outputs. See Frequency Table.
Feedback Clock Input. Connect to an output for normal operation.
VCO Divider Select Input. When set high, the VCO output is
divided by 2. When set low, the divider is bypassed. See
Table 1
Master Reset/Output Enable Input. When asserted high,
resets all of the internal flip-flops and also disables all of the
outputs. When pulled low, releases the internal flip-flops from
reset and enables all of the outputs.
PLL Enable Input. When asserted low, PLL is enabled. And
when set high, PLL is bypassed.
Frequency Select Inputs. See Frequency Table.
If SEL_ = 0, then QA, QB divider = 4, QC divider = 2
If SEL_ = 1, then QA divider = 6, QB divider = 2, QC divider
= 4
3.3V Power Supply for Output Clock Buffers.
3.3V Power Supply for PLL
3.3V Power Supply for Core Logic
Common Ground
3.3V, 180MHz, Multi-Output Zero Delay Buffer
Document#: 38-07085 Rev. *B
Description
Z9952
12/22/2002
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