ICS8524AY IDT, Integrated Device Technology Inc, ICS8524AY Datasheet - Page 11

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ICS8524AY

Manufacturer Part Number
ICS8524AY
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS8524AY

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
500MHz
Output Logic Level
HSTL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TQFP EP
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS8524AYLF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS8524AYLFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
S
Figure 5 shows a schematic example of the ICS8524. In this
example, the input is driven by a HSTL driver. The decoupling
T
The expose metal pad provides heat transfer from the device to
the P.C. board. The expose metal pad is ground pad connected
to ground plane through thermal via. The exposed pad on the
device to the exposed metal pad on the PCB is contacted through
8524AY
HERMAL
CHEMATIC
R
(U1-1)
E
ELEASE
1.8V
SIGNAL
TRACE
LVHSTL Driv er
XAMPLE
SOLDER M ASK
VDDO=1.8V
0.1uF
C1
Zo = 50 Ohm
Zo = 50 Ohm
(U1-16)
P
F
ATH
IGURE
GROUND PLANE
0.1uF
C2
R9
50
(U1-17)
6. P.C. B
F
0.1uF
C3
IGURE
R10
50
(U1-32)
VDD=3.3V
VDD=3.3V
0.1uF
C4
5. ICS8524 HSTL B
C9
0.1u
OARD FOR
R11
(U1-33)
R12
1K
0.1uF
C5
(U1-48)
1K
E
0.1uF
C6
XPOSED
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
THERM AL VIA
VDDO=1.8V
U3
ICS8524
(U1-49)
www.idt.com
VDDO
nc
nc
VDD
CLK
nCLK
CLK_SEL
PCLK
nPCLK
GND
OE
nc
nc
nQ21
Q21
VDDO
0.1uF
C7
11
(U1-64)
P
capacitors should be physically located near the power pin.
For ICS8524, the unused clock outputs can be left floating.
solder as shown in Figure 6. For further information, please re-
fer to the Application Note on Surface Mount Assembly of
Amkor’s Thermally /Electrically Enhance Leadframe Base Pack-
age, Amkor Technology.
AD
UFFER
0.1uF
C8
T
EXPOSED PAD
D
HERMAL
IFFERENTIAL
S
CHEMATIC
R
ELEASE
E
XAMPLE
VDDO
VDDO
Expose Metal Pad
(GROUND PAD)
nQ10
nQ11
nQ12
nQ13
nQ7
nQ8
nQ9
Q10
Q11
Q12
Q13
Q7
Q8
Q9
-
P
TO
ATH
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
Zo = 50
Zo = 50
Zo = 50
Zo = 50
-HSTL F
SOLDER
E
XAMPLE
L
OW
R2
50
R8
50
S
R1
50
R7
50
ANOUT
+
-
+
-
KEW
REV. B DECEMBER 6, 2010
ICS8524
SIGNAL
TRACE
, 1-
B
TO
UFFER
-22

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